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Commit 57499d13 authored by Elise Lennion's avatar Elise Lennion Committed by Greg Kroah-Hartman
Browse files

staging: sm750fb: Refine the code and remove unused code.



Every call to the function waitNextVerticalSync() used the macro
primaryWaitVerticalSync(), so the macro was removed and the function
waitNextVerticalSync() renamed to primary_wait_vertical_sync().

With this change, an unnecessary 'if' statement was removed together
with the lines within the 'else' statement, because it was never
satisfied.

The modified function was refined to better match the Kernel coding
style.

Signed-off-by: default avatarElise Lennion <elise.lennion@gmail.com>
Reviewed-by: default avatarDan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent cf9caf19
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+21 −50
Original line number Original line Diff line number Diff line
@@ -4,8 +4,6 @@
#include "ddk750_power.h"
#include "ddk750_power.h"
#include "ddk750_dvi.h"
#include "ddk750_dvi.h"


#define primaryWaitVerticalSync(delay) waitNextVerticalSync(0, delay)

static void setDisplayControl(int ctrl, int disp_state)
static void setDisplayControl(int ctrl, int disp_state)
{
{
	/* state != 0 means turn on both timing & plane en_bit */
	/* state != 0 means turn on both timing & plane en_bit */
@@ -61,21 +59,17 @@ static void setDisplayControl(int ctrl, int disp_state)
	}
	}
}
}


static void waitNextVerticalSync(int ctrl, int delay)
static void primary_wait_vertical_sync(int delay)
{
{
	unsigned int status;
	unsigned int status;


	if (!ctrl) {
		/* primary controller */

	/*
	/*
	 * Do not wait when the Primary PLL is off or display control is
	 * Do not wait when the Primary PLL is off or display control is
	 * already off. This will prevent the software to wait forever.
	 * already off. This will prevent the software to wait forever.
	 */
	 */
	if (!(PEEK32(PANEL_PLL_CTRL) & PLL_CTRL_POWER) ||
	if (!(PEEK32(PANEL_PLL_CTRL) & PLL_CTRL_POWER) ||
		    !(PEEK32(PANEL_DISPLAY_CTRL) & DISPLAY_CTRL_TIMING)) {
	    !(PEEK32(PANEL_DISPLAY_CTRL) & DISPLAY_CTRL_TIMING))
		return;
		return;
		}


	while (delay-- > 0) {
	while (delay-- > 0) {
		/* Wait for end of vsync. */
		/* Wait for end of vsync. */
@@ -88,29 +82,6 @@ static void waitNextVerticalSync(int ctrl, int delay)
			status = PEEK32(SYSTEM_CTRL);
			status = PEEK32(SYSTEM_CTRL);
		} while (!(status & SYSTEM_CTRL_PANEL_VSYNC_ACTIVE));
		} while (!(status & SYSTEM_CTRL_PANEL_VSYNC_ACTIVE));
	}
	}

	} else {
		/*
		 * Do not wait when the Primary PLL is off or display control is
		 * already off. This will prevent the software to wait forever.
		 */
		if (!(PEEK32(CRT_PLL_CTRL) & PLL_CTRL_POWER) ||
		    !(PEEK32(CRT_DISPLAY_CTRL) & DISPLAY_CTRL_TIMING)) {
			return;
		}

		while (delay-- > 0) {
			/* Wait for end of vsync. */
			do {
				status = PEEK32(SYSTEM_CTRL);
			} while (status & SYSTEM_CTRL_PANEL_VSYNC_ACTIVE);

			/* Wait for start of vsync. */
			do {
				status = PEEK32(SYSTEM_CTRL);
			} while (!(status & SYSTEM_CTRL_PANEL_VSYNC_ACTIVE));
		}
	}
}
}


static void swPanelPowerSequence(int disp, int delay)
static void swPanelPowerSequence(int disp, int delay)
@@ -121,22 +92,22 @@ static void swPanelPowerSequence(int disp, int delay)
	reg = PEEK32(PANEL_DISPLAY_CTRL);
	reg = PEEK32(PANEL_DISPLAY_CTRL);
	reg |= (disp ? PANEL_DISPLAY_CTRL_FPEN : 0);
	reg |= (disp ? PANEL_DISPLAY_CTRL_FPEN : 0);
	POKE32(PANEL_DISPLAY_CTRL, reg);
	POKE32(PANEL_DISPLAY_CTRL, reg);
	primaryWaitVerticalSync(delay);
	primary_wait_vertical_sync(delay);


	reg = PEEK32(PANEL_DISPLAY_CTRL);
	reg = PEEK32(PANEL_DISPLAY_CTRL);
	reg |= (disp ? PANEL_DISPLAY_CTRL_DATA : 0);
	reg |= (disp ? PANEL_DISPLAY_CTRL_DATA : 0);
	POKE32(PANEL_DISPLAY_CTRL, reg);
	POKE32(PANEL_DISPLAY_CTRL, reg);
	primaryWaitVerticalSync(delay);
	primary_wait_vertical_sync(delay);


	reg = PEEK32(PANEL_DISPLAY_CTRL);
	reg = PEEK32(PANEL_DISPLAY_CTRL);
	reg |= (disp ? PANEL_DISPLAY_CTRL_VBIASEN : 0);
	reg |= (disp ? PANEL_DISPLAY_CTRL_VBIASEN : 0);
	POKE32(PANEL_DISPLAY_CTRL, reg);
	POKE32(PANEL_DISPLAY_CTRL, reg);
	primaryWaitVerticalSync(delay);
	primary_wait_vertical_sync(delay);


	reg = PEEK32(PANEL_DISPLAY_CTRL);
	reg = PEEK32(PANEL_DISPLAY_CTRL);
	reg |= (disp ? PANEL_DISPLAY_CTRL_FPEN : 0);
	reg |= (disp ? PANEL_DISPLAY_CTRL_FPEN : 0);
	POKE32(PANEL_DISPLAY_CTRL, reg);
	POKE32(PANEL_DISPLAY_CTRL, reg);
	primaryWaitVerticalSync(delay);
	primary_wait_vertical_sync(delay);
}
}


void ddk750_setLogicalDispOut(disp_output_t output)
void ddk750_setLogicalDispOut(disp_output_t output)