Loading drivers/clk/qcom/gcc-lito.c +5 −5 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2018, The Linux Foundation. All rights reserved. * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. */ #define pr_fmt(fmt) "clk: %s: " fmt, __func__ Loading Loading @@ -2305,7 +2305,7 @@ static struct clk_branch gcc_ufs_phy_phy_aux_clk = { static struct clk_branch gcc_ufs_phy_rx_symbol_0_clk = { .halt_reg = 0x77020, .halt_check = BRANCH_HALT, .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x77020, .enable_mask = BIT(0), Loading @@ -2318,7 +2318,7 @@ static struct clk_branch gcc_ufs_phy_rx_symbol_0_clk = { static struct clk_branch gcc_ufs_phy_rx_symbol_1_clk = { .halt_reg = 0x770b8, .halt_check = BRANCH_HALT, .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x770b8, .enable_mask = BIT(0), Loading @@ -2331,7 +2331,7 @@ static struct clk_branch gcc_ufs_phy_rx_symbol_1_clk = { static struct clk_branch gcc_ufs_phy_tx_symbol_0_clk = { .halt_reg = 0x7701c, .halt_check = BRANCH_HALT, .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x7701c, .enable_mask = BIT(0), Loading Loading @@ -2462,7 +2462,7 @@ static struct clk_branch gcc_usb3_prim_phy_com_aux_clk = { static struct clk_branch gcc_usb3_prim_phy_pipe_clk = { .halt_reg = 0xf05c, .halt_check = BRANCH_HALT, .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0xf05c, .enable_mask = BIT(0), Loading Loading
drivers/clk/qcom/gcc-lito.c +5 −5 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2018, The Linux Foundation. All rights reserved. * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. */ #define pr_fmt(fmt) "clk: %s: " fmt, __func__ Loading Loading @@ -2305,7 +2305,7 @@ static struct clk_branch gcc_ufs_phy_phy_aux_clk = { static struct clk_branch gcc_ufs_phy_rx_symbol_0_clk = { .halt_reg = 0x77020, .halt_check = BRANCH_HALT, .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x77020, .enable_mask = BIT(0), Loading @@ -2318,7 +2318,7 @@ static struct clk_branch gcc_ufs_phy_rx_symbol_0_clk = { static struct clk_branch gcc_ufs_phy_rx_symbol_1_clk = { .halt_reg = 0x770b8, .halt_check = BRANCH_HALT, .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x770b8, .enable_mask = BIT(0), Loading @@ -2331,7 +2331,7 @@ static struct clk_branch gcc_ufs_phy_rx_symbol_1_clk = { static struct clk_branch gcc_ufs_phy_tx_symbol_0_clk = { .halt_reg = 0x7701c, .halt_check = BRANCH_HALT, .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x7701c, .enable_mask = BIT(0), Loading Loading @@ -2462,7 +2462,7 @@ static struct clk_branch gcc_usb3_prim_phy_com_aux_clk = { static struct clk_branch gcc_usb3_prim_phy_pipe_clk = { .halt_reg = 0xf05c, .halt_check = BRANCH_HALT, .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0xf05c, .enable_mask = BIT(0), Loading