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Commit 56d94d70 authored by Takashi Iwai's avatar Takashi Iwai
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Merge branch 'topic/hda' into for-next

parents bb63f726 fc4f000b
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@@ -7,7 +7,7 @@ This is the authoritative documentation on the design, interface and
conventions of cgroup v2.  It describes all userland-visible aspects
conventions of cgroup v2.  It describes all userland-visible aspects
of cgroup including core and specific controller behaviors.  All
of cgroup including core and specific controller behaviors.  All
future changes must be reflected in this document.  Documentation for
future changes must be reflected in this document.  Documentation for
v1 is available under Documentation/cgroup-legacy/.
v1 is available under Documentation/cgroup-v1/.


CONTENTS
CONTENTS


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@@ -30,7 +30,7 @@ that they are defined using standard clock bindings with following
clock-output-names:
clock-output-names:
 - "xin24m" - crystal input - required,
 - "xin24m" - crystal input - required,
 - "ext_i2s" - external I2S clock - optional,
 - "ext_i2s" - external I2S clock - optional,
 - "ext_gmac" - external GMAC clock - optional
 - "rmii_clkin" - external EMAC clock - optional


Example: Clock controller node:
Example: Clock controller node:


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@@ -24,9 +24,8 @@ Main node required properties:
		1 = edge triggered
		1 = edge triggered
		4 = level triggered
		4 = level triggered


  Cells 4 and beyond are reserved for future use. When the 1st cell
  Cells 4 and beyond are reserved for future use and must have a value
  has a value of 0 or 1, cells 4 and beyond act as padding, and may be
  of 0 if present.
  ignored. It is recommended that padding cells have a value of 0.


- reg : Specifies base physical address(s) and size of the GIC
- reg : Specifies base physical address(s) and size of the GIC
  registers, in the following order:
  registers, in the following order:
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@@ -82,8 +82,8 @@ Example:
				  "ch16", "ch17", "ch18", "ch19",
				  "ch16", "ch17", "ch18", "ch19",
				  "ch20", "ch21", "ch22", "ch23",
				  "ch20", "ch21", "ch22", "ch23",
				  "ch24";
				  "ch24";
		clocks = <&mstp8_clks R8A7795_CLK_ETHERAVB>;
		clocks = <&cpg CPG_MOD 812>;
		power-domains = <&cpg_clocks>;
		power-domains = <&cpg>;
		phy-mode = "rgmii-id";
		phy-mode = "rgmii-id";
		phy-handle = <&phy0>;
		phy-handle = <&phy0>;


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@@ -8,6 +8,7 @@ OHCI and EHCI controllers.
Required properties:
Required properties:
- compatible: "renesas,pci-r8a7790" for the R8A7790 SoC;
- compatible: "renesas,pci-r8a7790" for the R8A7790 SoC;
	      "renesas,pci-r8a7791" for the R8A7791 SoC;
	      "renesas,pci-r8a7791" for the R8A7791 SoC;
	      "renesas,pci-r8a7793" for the R8A7793 SoC;
	      "renesas,pci-r8a7794" for the R8A7794 SoC;
	      "renesas,pci-r8a7794" for the R8A7794 SoC;
	      "renesas,pci-rcar-gen2" for a generic R-Car Gen2 compatible device
	      "renesas,pci-rcar-gen2" for a generic R-Car Gen2 compatible device


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