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Commit 562e0027 authored by Marc Zyngier's avatar Marc Zyngier
Browse files

ARM: GIC: Add global gic_handle_irq() function 



Provide the GIC code with a low level handler that can be used
by platforms using CONFIG_MULTI_IRQ_HANDLER.

Signed-off-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
parent baeeb822

arch/arm/common/gic.c

+27 −0
Original line number Diff line number Diff line
@@ -40,6 +40,7 @@ 
#include <linux/slab.h>



#include <asm/irq.h>

#include <asm/exception.h>

#include <asm/mach/irq.h>

#include <asm/hardware/gic.h>
@@ -272,6 +273,32 @@ static int gic_set_wake(struct irq_data *d, unsigned int on) 
#define gic_set_wake	NULL

#endif



asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)

{

	u32 irqstat, irqnr;

	struct gic_chip_data *gic = &gic_data[0];

	void __iomem *cpu_base = gic_data_cpu_base(gic);



	do {

		irqstat = readl_relaxed(cpu_base + GIC_CPU_INTACK);

		irqnr = irqstat & ~0x1c00;



		if (likely(irqnr > 15 && irqnr < 1021)) {

			irqnr = irq_domain_to_irq(&gic->domain, irqnr);

			handle_IRQ(irqnr, regs);

			continue;

		}

		if (irqnr < 16) {

			writel_relaxed(irqstat, cpu_base + GIC_CPU_EOI);

#ifdef CONFIG_SMP

			handle_IPI(irqnr, regs);

#endif

			continue;

		}

		break;

	} while (1);

}



static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)

{

	struct gic_chip_data *chip_data = irq_get_handler_data(irq);

arch/arm/include/asm/hardware/gic.h

+1 −0
Original line number Diff line number Diff line
@@ -43,6 +43,7 @@ void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *, 
		    u32 offset);

int gic_of_init(struct device_node *node, struct device_node *parent);

void gic_secondary_init(unsigned int);

void gic_handle_irq(struct pt_regs *regs);

void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);

void gic_raise_softirq(const struct cpumask *mask, unsigned int irq);