Loading qcom/lagoon-coresight.dtsi +16 −0 Original line number Diff line number Diff line Loading @@ -3019,4 +3019,20 @@ clock-names = "apb_pclk"; }; ipcb_tgu: tgu@6b0b000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb999>; reg = <0x06b0b000 0x1000>; reg-names = "tgu-base"; tgu-steps = <3>; tgu-conditions = <4>; tgu-regs = <4>; tgu-timer-counters = <8>; coresight-name = "coresight-tgu-ipcb"; clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; }; }; Loading
qcom/lagoon-coresight.dtsi +16 −0 Original line number Diff line number Diff line Loading @@ -3019,4 +3019,20 @@ clock-names = "apb_pclk"; }; ipcb_tgu: tgu@6b0b000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb999>; reg = <0x06b0b000 0x1000>; reg-names = "tgu-base"; tgu-steps = <3>; tgu-conditions = <4>; tgu-regs = <4>; tgu-timer-counters = <8>; coresight-name = "coresight-tgu-ipcb"; clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; }; };