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Commit 53b4e14f authored by Vatsal Bucha's avatar Vatsal Bucha
Browse files

ASoC: bolero: Add callback to tanggu in SSR Disable 



Add callback event in ssr_disable to disable
tanggu PA before regcache_cache_only
to avoid pop after PDR. Also update proper bit
while RX Mute.

Change-Id: I06402269d393ca74c11611482cafbde03f4c62b9
Signed-off-by: default avatarVatsal Bucha <vbucha@codeaurora.org>
parent 71d091e2

asoc/codecs/bolero/bolero-cdc.c

+1 −0
Original line number Diff line number Diff line
@@ -581,6 +581,7 @@ static void bolero_ssr_disable(struct device *dev, void *data) 
	struct bolero_priv *priv = data;

	int macro_idx;



	bolero_cdc_notifier_call(priv, BOLERO_WCD_EVT_PA_OFF_PRE_SSR);

	regcache_cache_only(priv->regmap, true);



	mutex_lock(&priv->clk_lock);

asoc/codecs/bolero/internal.h

+1 −0
Original line number Diff line number Diff line
@@ -20,6 +20,7 @@ 
/* from bolero to WCD events */

enum {

	BOLERO_WCD_EVT_TX_CH_HOLD_CLEAR = 1,

	BOLERO_WCD_EVT_PA_OFF_PRE_SSR,

	BOLERO_WCD_EVT_SSR_DOWN,

	BOLERO_WCD_EVT_SSR_UP,

};

asoc/codecs/bolero/rx-macro.c

+4 −3
Original line number Diff line number Diff line
@@ -1117,7 +1117,7 @@ static int rx_macro_mclk_ctrl(struct device *dev, bool enable) 
static int rx_macro_event_handler(struct snd_soc_codec *codec, u16 event,

				  u32 data)

{

	u16 reg = 0, reg_mix = 0, rx_idx = 0, mute = 0x0;

	u16 reg = 0, reg_mix = 0, rx_idx = 0, mute = 0x0, val = 0;

	struct device *rx_dev = NULL;

	struct rx_macro_priv *rx_priv = NULL;
@@ -1128,12 +1128,13 @@ static int rx_macro_event_handler(struct snd_soc_codec *codec, u16 event, 
	case BOLERO_MACRO_EVT_RX_MUTE:

		rx_idx = data >> 0x10;

		mute = data & 0xffff;

		val = mute ? 0x10 : 0x00;

		reg = BOLERO_CDC_RX_RX0_RX_PATH_CTL + (rx_idx *

					RX_MACRO_RX_PATH_OFFSET);

		reg_mix = BOLERO_CDC_RX_RX0_RX_PATH_MIX_CTL + (rx_idx *

					RX_MACRO_RX_PATH_OFFSET);

		snd_soc_update_bits(codec, reg, 0x10, mute << 0x10);

		snd_soc_update_bits(codec, reg_mix, 0x10, mute << 0x10);

		snd_soc_update_bits(codec, reg, 0x10, val);

		snd_soc_update_bits(codec, reg_mix, 0x10, val);

		break;

	case BOLERO_MACRO_EVT_IMPED_TRUE:

		rx_macro_wcd_clsh_imped_config(codec, data, true);