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Commit 51f5d744 authored by Rabin Vincent's avatar Rabin Vincent Committed by Dan Williams
Browse files

ste_dma40: remove enum for endianess 



A bool will suffice.  The default is little endian.

Acked-by: default avatarJonas Aaberg <jonas.aberg@stericsson.com>
Signed-off-by: default avatarRabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@stericsson.com>
Signed-off-by: default avatarDan Williams <dan.j.williams@intel.com>
parent 4a6aed3c

arch/arm/mach-ux500/devices-db8500.c

+0 −4
Original line number Diff line number Diff line
@@ -135,12 +135,10 @@ struct stedma40_chan_cfg dma40_memcpy_conf_phy = { 
	.mode = STEDMA40_MODE_PHYSICAL,

	.dir = STEDMA40_MEM_TO_MEM,



	.src_info.endianess = STEDMA40_LITTLE_ENDIAN,

	.src_info.data_width = STEDMA40_BYTE_WIDTH,

	.src_info.psize = STEDMA40_PSIZE_PHY_1,

	.src_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,



	.dst_info.endianess = STEDMA40_LITTLE_ENDIAN,

	.dst_info.data_width = STEDMA40_BYTE_WIDTH,

	.dst_info.psize = STEDMA40_PSIZE_PHY_1,

	.dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,
@@ -149,12 +147,10 @@ struct stedma40_chan_cfg dma40_memcpy_conf_phy = { 
struct stedma40_chan_cfg dma40_memcpy_conf_log = {

	.dir = STEDMA40_MEM_TO_MEM,



	.src_info.endianess = STEDMA40_LITTLE_ENDIAN,

	.src_info.data_width = STEDMA40_BYTE_WIDTH,

	.src_info.psize = STEDMA40_PSIZE_LOG_1,

	.src_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,



	.dst_info.endianess = STEDMA40_LITTLE_ENDIAN,

	.dst_info.data_width = STEDMA40_BYTE_WIDTH,

	.dst_info.psize = STEDMA40_PSIZE_LOG_1,

	.dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,

arch/arm/plat-nomadik/include/plat/ste_dma40.h

+2 −7
Original line number Diff line number Diff line
@@ -69,11 +69,6 @@ enum stedma40_flow_ctrl { 
	STEDMA40_FLOW_CTRL,

};



enum stedma40_endianess {

	STEDMA40_LITTLE_ENDIAN,

	STEDMA40_BIG_ENDIAN

};



enum stedma40_periph_data_width {

	STEDMA40_BYTE_WIDTH = STEDMA40_ESIZE_8_BIT,

	STEDMA40_HALFWORD_WIDTH = STEDMA40_ESIZE_16_BIT,
@@ -92,13 +87,13 @@ enum stedma40_xfer_dir { 
/**

 * struct stedma40_chan_cfg - dst/src channel configuration

 *

 * @endianess: Endianess of the src/dst hardware

 * @big_endian: true if the src/dst should be read as big endian

 * @data_width: Data width of the src/dst hardware

 * @p_size: Burst size

 * @flow_ctrl: Flow control on/off.

 */

struct stedma40_half_channel_info {

	enum stedma40_endianess endianess;

	bool big_endian;

	enum stedma40_periph_data_width data_width;

	int psize;

	enum stedma40_flow_ctrl flow_ctrl;

drivers/dma/ste_dma40.c

+2 −2
Original line number Diff line number Diff line
@@ -2239,11 +2239,11 @@ static void d40_set_runtime_config(struct dma_chan *chan, 
	/* Set up all the endpoint configs */

	cfg->src_info.data_width = addr_width;

	cfg->src_info.psize = psize;

	cfg->src_info.endianess = STEDMA40_LITTLE_ENDIAN;

	cfg->src_info.big_endian = false;

	cfg->src_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL;

	cfg->dst_info.data_width = addr_width;

	cfg->dst_info.psize = psize;

	cfg->dst_info.endianess = STEDMA40_LITTLE_ENDIAN;

	cfg->dst_info.big_endian = false;

	cfg->dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL;



	/* Fill in register values */

drivers/dma/ste_dma40_ll.c

+4 −2
Original line number Diff line number Diff line
@@ -113,8 +113,10 @@ void d40_phy_cfg(struct stedma40_chan_cfg *cfg, 
		dst |= 1 << D40_SREG_CFG_PRI_POS;

	}



	src |= cfg->src_info.endianess << D40_SREG_CFG_LBE_POS;

	dst |= cfg->dst_info.endianess << D40_SREG_CFG_LBE_POS;

	if (cfg->src_info.big_endian)

		src |= 1 << D40_SREG_CFG_LBE_POS;

	if (cfg->dst_info.big_endian)

		dst |= 1 << D40_SREG_CFG_LBE_POS;



	*src_cfg = src;

	*dst_cfg = dst;