Commit 51c00a9f authored Mar 06, 2017 by Geert Uytterhoeven Committed by Simon Horman Mar 07, 2017

ARM: dts: r8a7745: Remove unit-address and reg from integrated cache



The Cortex-A7 cache controller is an integrated controller, and thus the
device node representing it should not have a unit-addresses or reg
property.

Fixes: c9536024 ("ARM: dts: r8a7745: initial SoC device tree")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

parent 37f0c804

arch/arm/boot/dts/r8a7745.dtsi

+1 −2

Original line number	Diff line number	Diff line
		@@ -32,9 +32,8 @@
		next-level-cache = <&L2_CA7>;
		};

		L2_CA7: cache-controller@0 {
		L2_CA7: cache-controller-0 {
		compatible = "cache";
		reg = <0>;
		cache-unified;
		cache-level = <2>;
		power-domains = <&sysc R8A7745_PD_CA7_SCU>;