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Commit 51a831a7 authored by Daniel Vetter's avatar Daniel Vetter
Browse files

Merge remote-tracking branch 'airlied/drm-next' into drm-intel-next-queued 



Chris Wilson needs the new drm_driver->release callback to make sure
the shiny new dma-buf testcases don't oops the driver on unload.

Signed-off-by: default avatarDaniel Vetter <daniel.vetter@intel.com>
parents 4f4631af 13f62f54

Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt

+35 −0
Original line number Diff line number Diff line
@@ -56,6 +56,18 @@ Required properties for V3D: 
- interrupts:	The interrupt number

		  See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt



Required properties for DSI:

- compatible:	Should be "brcm,bcm2835-dsi0" or "brcm,bcm2835-dsi1"

- reg:		Physical base address and length of the DSI block's registers

- interrupts:	The interrupt number

		  See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt

- clocks:	a) phy: The DSI PLL clock feeding the DSI analog PHY

		b) escape: The DSI ESC clock from CPRMAN

		c) pixel: The DSI pixel clock from CPRMAN

- clock-output-names:

		The 3 clocks output from the DSI analog PHY: dsi[01]_byte,

		dsi[01]_ddr2, and dsi[01]_ddr



[1] Documentation/devicetree/bindings/media/video-interfaces.txt



Example:
@@ -99,6 +111,29 @@ dpi: dpi@7e208000 { 
	};

};



dsi1: dsi@7e700000 {

	compatible = "brcm,bcm2835-dsi1";

	reg = <0x7e700000 0x8c>;

	interrupts = <2 12>;

	#address-cells = <1>;

	#size-cells = <0>;

	#clock-cells = <1>;



	clocks = <&clocks BCM2835_PLLD_DSI1>,

		 <&clocks BCM2835_CLOCK_DSI1E>,

		 <&clocks BCM2835_CLOCK_DSI1P>;

	clock-names = "phy", "escape", "pixel";



	clock-output-names = "dsi1_byte", "dsi1_ddr2", "dsi1_ddr";



	pitouchscreen: panel@0 {

		compatible = "raspberrypi,touchscreen";

		reg = <0>;



		<...>

	};

};



vec: vec@7e806000 {

	compatible = "brcm,bcm2835-vec";

	reg = <0x7e806000 0x1000>;

Documentation/devicetree/bindings/display/msm/gpu.txt

+12 −26
Original line number Diff line number Diff line 
Qualcomm adreno/snapdragon GPU



Required properties:

- compatible: "qcom,adreno-3xx"

- compatible: "qcom,adreno-XYZ.W", "qcom,adreno"

    for example: "qcom,adreno-306.0", "qcom,adreno"

  Note that you need to list the less specific "qcom,adreno" (since this

  is what the device is matched on), in addition to the more specific

  with the chip-id.

- reg: Physical base address and length of the controller's registers.

- interrupts: The interrupt signal from the gpu.

- clocks: device clocks

  See ../clocks/clock-bindings.txt for details.

- clock-names: the following clocks are required:

  * "core_clk"

  * "iface_clk"

  * "mem_iface_clk"

- qcom,chipid: gpu chip-id.  Note this may become optional for future

  devices if we can reliably read the chipid from hw

- qcom,gpu-pwrlevels: list of operating points

  - compatible: "qcom,gpu-pwrlevels"

  - for each qcom,gpu-pwrlevel:

    - qcom,gpu-freq: requested gpu clock speed

    - NOTE: downstream android driver defines additional parameters to

      configure memory bandwidth scaling per OPP.

  * "core"

  * "iface"

  * "mem_iface"



Example:
@@ -25,28 +21,18 @@ Example: 
	...



	gpu: qcom,kgsl-3d0@4300000 {

		compatible = "qcom,adreno-3xx";

		compatible = "qcom,adreno-320.2", "qcom,adreno";

		reg = <0x04300000 0x20000>;

		reg-names = "kgsl_3d0_reg_memory";

		interrupts = <GIC_SPI 80 0>;

		interrupt-names = "kgsl_3d0_irq";

		clock-names =

		    "core_clk",

		    "iface_clk",

		    "mem_iface_clk";

		    "core",

		    "iface",

		    "mem_iface";

		clocks =

		    <&mmcc GFX3D_CLK>,

		    <&mmcc GFX3D_AHB_CLK>,

		    <&mmcc MMSS_IMEM_AHB_CLK>;

		qcom,chipid = <0x03020100>;

		qcom,gpu-pwrlevels {

			compatible = "qcom,gpu-pwrlevels";

			qcom,gpu-pwrlevel@0 {

				qcom,gpu-freq = <450000000>;

			};

			qcom,gpu-pwrlevel@1 {

				qcom,gpu-freq = <27000000>;

			};

		};

	};

};

Documentation/gpu/drm-mm.rst

+11 −4
Original line number Diff line number Diff line
@@ -291,10 +291,17 @@ To use :c:func:`drm_gem_mmap()`, drivers must fill the struct 
:c:type:`struct drm_driver <drm_driver>` gem_vm_ops field

with a pointer to VM operations.



struct vm_operations_struct \*gem_vm_ops struct

vm_operations_struct { void (\*open)(struct vm_area_struct \* area);

void (\*close)(struct vm_area_struct \* area); int (\*fault)(struct

vm_area_struct \*vma, struct vm_fault \*vmf); };

The VM operations is a :c:type:`struct vm_operations_struct <vm_operations_struct>`

made up of several fields, the more interesting ones being:



.. code-block:: c



	struct vm_operations_struct {

		void (*open)(struct vm_area_struct * area);

		void (*close)(struct vm_area_struct * area);

		int (*fault)(struct vm_fault *vmf);

	};





The open and close operations must update the GEM object reference

count. Drivers can use the :c:func:`drm_gem_vm_open()` and

MAINTAINERS

+1 −0
Original line number Diff line number Diff line
@@ -3970,6 +3970,7 @@ S: Maintained 
L:	linux-media@vger.kernel.org

L:	dri-devel@lists.freedesktop.org

F:	drivers/dma-buf/sync_*

F:	drivers/dma-buf/dma-fence*

F:	drivers/dma-buf/sw_sync.c

F:	include/linux/sync_file.h

F:	include/uapi/linux/sync_file.h

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+1 −0
Original line number Diff line number Diff line
@@ -1709,6 +1709,7 @@ int amdgpu_cs_parser_init(struct amdgpu_cs_parser *p, void *data); 
int amdgpu_cs_get_ring(struct amdgpu_device *adev, u32 ip_type,

		       u32 ip_instance, u32 ring,

		       struct amdgpu_ring **out_ring);

void amdgpu_cs_report_moved_bytes(struct amdgpu_device *adev, u64 num_bytes);

void amdgpu_ttm_placement_from_domain(struct amdgpu_bo *abo, u32 domain);

bool amdgpu_ttm_bo_is_amdgpu_bo(struct ttm_buffer_object *bo);

int amdgpu_ttm_tt_get_user_pages(struct ttm_tt *ttm, struct page **pages);