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Unverified Commit 516ddd79 authored by Tiago Brusamarello's avatar Tiago Brusamarello Committed by Mark Brown
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spi: spi-fsl-espi: Log fifo counters on error



Log RX and TX fifo counters when a transfer is done and these are not
zero.

Signed-off-by: default avatarTiago Brusamarello <tiago.brusamarello@datacom.ind.br>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 2ca300ac
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+4 −1
Original line number Diff line number Diff line
@@ -547,8 +547,11 @@ static void fsl_espi_cpu_irq(struct fsl_espi *espi, u32 events)
		dev_err(espi->dev,
			"Transfer done but SPIE_DON isn't set!\n");

	if (SPIE_RXCNT(events) || SPIE_TXCNT(events) != FSL_ESPI_FIFO_SIZE)
	if (SPIE_RXCNT(events) || SPIE_TXCNT(events) != FSL_ESPI_FIFO_SIZE) {
		dev_err(espi->dev, "Transfer done but rx/tx fifo's aren't empty!\n");
		dev_err(espi->dev, "SPIE_RXCNT = %d, SPIE_TXCNT = %d\n",
			SPIE_RXCNT(events), SPIE_TXCNT(events));
	}

	complete(&espi->done);
}