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Commit 511c7023 authored by Thierry Reding's avatar Thierry Reding
Browse files

drm/tegra: dc: Support more formats 



Also, split up formats into per-SoC lists because not all generations
support all of them. Note that the list is now exhaustive for all RGB
formats, but not for YUV and indexed formats.

Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 71835caa

drivers/gpu/drm/tegra/dc.c

+137 −10
Original line number Diff line number Diff line
@@ -298,12 +298,60 @@ static void tegra_dc_setup_window(struct tegra_dc *dc, unsigned int index, 
	spin_unlock_irqrestore(&dc->lock, flags);

}



static const u32 tegra_primary_plane_formats[] = {

	DRM_FORMAT_XBGR8888,

static const u32 tegra20_primary_formats[] = {

	DRM_FORMAT_ARGB4444,

	DRM_FORMAT_ARGB1555,

	DRM_FORMAT_RGB565,

	DRM_FORMAT_RGBA5551,

	DRM_FORMAT_ABGR8888,

	DRM_FORMAT_XRGB8888,

	DRM_FORMAT_ARGB8888,

};



static const u32 tegra114_primary_formats[] = {

	DRM_FORMAT_ARGB4444,

	DRM_FORMAT_ARGB1555,

	DRM_FORMAT_RGB565,

	DRM_FORMAT_RGBA5551,

	DRM_FORMAT_ABGR8888,

	DRM_FORMAT_ARGB8888,

	/* new on Tegra114 */

	DRM_FORMAT_ABGR4444,

	DRM_FORMAT_ABGR1555,

	DRM_FORMAT_BGRA5551,

	DRM_FORMAT_XRGB1555,

	DRM_FORMAT_RGBX5551,

	DRM_FORMAT_XBGR1555,

	DRM_FORMAT_BGRX5551,

	DRM_FORMAT_BGR565,

	DRM_FORMAT_BGRA8888,

	DRM_FORMAT_RGBA8888,

	DRM_FORMAT_XRGB8888,

	DRM_FORMAT_XBGR8888,

};



static const u32 tegra124_primary_formats[] = {

	DRM_FORMAT_ARGB4444,

	DRM_FORMAT_ARGB1555,

	DRM_FORMAT_RGB565,

	DRM_FORMAT_RGBA5551,

	DRM_FORMAT_ABGR8888,

	DRM_FORMAT_ARGB8888,

	/* new on Tegra114 */

	DRM_FORMAT_ABGR4444,

	DRM_FORMAT_ABGR1555,

	DRM_FORMAT_BGRA5551,

	DRM_FORMAT_XRGB1555,

	DRM_FORMAT_RGBX5551,

	DRM_FORMAT_XBGR1555,

	DRM_FORMAT_BGRX5551,

	DRM_FORMAT_BGR565,

	DRM_FORMAT_BGRA8888,

	DRM_FORMAT_RGBA8888,

	DRM_FORMAT_XRGB8888,

	DRM_FORMAT_XBGR8888,

	/* new on Tegra124 */

	DRM_FORMAT_RGBX8888,

	DRM_FORMAT_BGRX8888,

};



static int tegra_plane_atomic_check(struct drm_plane *plane,
@@ -461,8 +509,8 @@ static struct drm_plane *tegra_primary_plane_create(struct drm_device *drm, 
	if (!plane)

		return ERR_PTR(-ENOMEM);



	num_formats = ARRAY_SIZE(tegra_primary_plane_formats);

	formats = tegra_primary_plane_formats;

	num_formats = dc->soc->num_primary_formats;

	formats = dc->soc->primary_formats;



	/*

	 * XXX compute offset so that we can directly access windows.
@@ -643,12 +691,71 @@ static struct drm_plane *tegra_dc_cursor_plane_create(struct drm_device *drm, 
	return &plane->base;

}



static const uint32_t tegra_overlay_plane_formats[] = {

	DRM_FORMAT_XBGR8888,

static const u32 tegra20_overlay_formats[] = {

	DRM_FORMAT_ARGB4444,

	DRM_FORMAT_ARGB1555,

	DRM_FORMAT_RGB565,

	DRM_FORMAT_RGBA5551,

	DRM_FORMAT_ABGR8888,

	DRM_FORMAT_ARGB8888,

	/* planar formats */

	DRM_FORMAT_UYVY,

	DRM_FORMAT_YUYV,

	DRM_FORMAT_YUV420,

	DRM_FORMAT_YUV422,

};



static const u32 tegra114_overlay_formats[] = {

	DRM_FORMAT_ARGB4444,

	DRM_FORMAT_ARGB1555,

	DRM_FORMAT_RGB565,

	DRM_FORMAT_RGBA5551,

	DRM_FORMAT_ABGR8888,

	DRM_FORMAT_XRGB8888,

	DRM_FORMAT_ARGB8888,

	/* new on Tegra114 */

	DRM_FORMAT_ABGR4444,

	DRM_FORMAT_ABGR1555,

	DRM_FORMAT_BGRA5551,

	DRM_FORMAT_XRGB1555,

	DRM_FORMAT_RGBX5551,

	DRM_FORMAT_XBGR1555,

	DRM_FORMAT_BGRX5551,

	DRM_FORMAT_BGR565,

	DRM_FORMAT_BGRA8888,

	DRM_FORMAT_RGBA8888,

	DRM_FORMAT_XRGB8888,

	DRM_FORMAT_XBGR8888,

	/* planar formats */

	DRM_FORMAT_UYVY,

	DRM_FORMAT_YUYV,

	DRM_FORMAT_YUV420,

	DRM_FORMAT_YUV422,

};



static const u32 tegra124_overlay_formats[] = {

	DRM_FORMAT_ARGB4444,

	DRM_FORMAT_ARGB1555,

	DRM_FORMAT_RGB565,

	DRM_FORMAT_RGBA5551,

	DRM_FORMAT_ABGR8888,

	DRM_FORMAT_ARGB8888,

	/* new on Tegra114 */

	DRM_FORMAT_ABGR4444,

	DRM_FORMAT_ABGR1555,

	DRM_FORMAT_BGRA5551,

	DRM_FORMAT_XRGB1555,

	DRM_FORMAT_RGBX5551,

	DRM_FORMAT_XBGR1555,

	DRM_FORMAT_BGRX5551,

	DRM_FORMAT_BGR565,

	DRM_FORMAT_BGRA8888,

	DRM_FORMAT_RGBA8888,

	DRM_FORMAT_XRGB8888,

	DRM_FORMAT_XBGR8888,

	/* new on Tegra124 */

	DRM_FORMAT_RGBX8888,

	DRM_FORMAT_BGRX8888,

	/* planar formats */

	DRM_FORMAT_UYVY,

	DRM_FORMAT_YUYV,

	DRM_FORMAT_YUV420,
@@ -673,8 +780,8 @@ static struct drm_plane *tegra_dc_overlay_plane_create(struct drm_device *drm, 
	plane->index = index;

	plane->depth = 0;



	num_formats = ARRAY_SIZE(tegra_overlay_plane_formats);

	formats = tegra_overlay_plane_formats;

	num_formats = dc->soc->num_overlay_formats;

	formats = dc->soc->overlay_formats;



	err = drm_universal_plane_init(drm, &plane->base, 1 << dc->pipe,

				       &tegra_plane_funcs, formats,
@@ -1730,6 +1837,10 @@ static const struct tegra_dc_soc_info tegra20_dc_soc_info = { 
	.has_powergate = false,

	.broken_reset = true,

	.has_nvdisplay = false,

	.num_primary_formats = ARRAY_SIZE(tegra20_primary_formats),

	.primary_formats = tegra20_primary_formats,

	.num_overlay_formats = ARRAY_SIZE(tegra20_overlay_formats),

	.overlay_formats = tegra20_overlay_formats,

};



static const struct tegra_dc_soc_info tegra30_dc_soc_info = {
@@ -1741,6 +1852,10 @@ static const struct tegra_dc_soc_info tegra30_dc_soc_info = { 
	.has_powergate = false,

	.broken_reset = false,

	.has_nvdisplay = false,

	.num_primary_formats = ARRAY_SIZE(tegra20_primary_formats),

	.primary_formats = tegra20_primary_formats,

	.num_overlay_formats = ARRAY_SIZE(tegra20_overlay_formats),

	.overlay_formats = tegra20_overlay_formats,

};



static const struct tegra_dc_soc_info tegra114_dc_soc_info = {
@@ -1752,6 +1867,10 @@ static const struct tegra_dc_soc_info tegra114_dc_soc_info = { 
	.has_powergate = true,

	.broken_reset = false,

	.has_nvdisplay = false,

	.num_primary_formats = ARRAY_SIZE(tegra114_primary_formats),

	.primary_formats = tegra114_primary_formats,

	.num_overlay_formats = ARRAY_SIZE(tegra114_overlay_formats),

	.overlay_formats = tegra114_overlay_formats,

};



static const struct tegra_dc_soc_info tegra124_dc_soc_info = {
@@ -1763,6 +1882,10 @@ static const struct tegra_dc_soc_info tegra124_dc_soc_info = { 
	.has_powergate = true,

	.broken_reset = false,

	.has_nvdisplay = false,

	.num_primary_formats = ARRAY_SIZE(tegra124_primary_formats),

	.primary_formats = tegra114_primary_formats,

	.num_overlay_formats = ARRAY_SIZE(tegra124_overlay_formats),

	.overlay_formats = tegra114_overlay_formats,

};



static const struct tegra_dc_soc_info tegra210_dc_soc_info = {
@@ -1774,6 +1897,10 @@ static const struct tegra_dc_soc_info tegra210_dc_soc_info = { 
	.has_powergate = true,

	.broken_reset = false,

	.has_nvdisplay = false,

	.num_primary_formats = ARRAY_SIZE(tegra114_primary_formats),

	.primary_formats = tegra114_primary_formats,

	.num_overlay_formats = ARRAY_SIZE(tegra114_overlay_formats),

	.overlay_formats = tegra114_overlay_formats,

};



static const struct tegra_windowgroup_soc tegra186_dc_wgrps[] = {

drivers/gpu/drm/tegra/dc.h

+18 −2
Original line number Diff line number Diff line
@@ -61,6 +61,10 @@ struct tegra_dc_soc_info { 
	bool has_nvdisplay;

	const struct tegra_windowgroup_soc *wgrps;

	unsigned int num_wgrps;

	const u32 *primary_formats;

	unsigned int num_primary_formats;

	const u32 *overlay_formats;

	unsigned int num_overlay_formats;

};



struct tegra_dc {
@@ -582,9 +586,9 @@ int tegra_dc_rgb_exit(struct tegra_dc *dc); 
#define WIN_COLOR_DEPTH_P4              2

#define WIN_COLOR_DEPTH_P8              3

#define WIN_COLOR_DEPTH_B4G4R4A4        4

#define WIN_COLOR_DEPTH_B5G5R5A         5

#define WIN_COLOR_DEPTH_B5G5R5A1        5

#define WIN_COLOR_DEPTH_B5G6R5          6

#define WIN_COLOR_DEPTH_AB5G5R5         7

#define WIN_COLOR_DEPTH_A1B5G5R5        7

#define WIN_COLOR_DEPTH_B8G8R8A8       12

#define WIN_COLOR_DEPTH_R8G8B8A8       13

#define WIN_COLOR_DEPTH_B6x2G6x2R6x2A8 14
@@ -599,8 +603,20 @@ int tegra_dc_rgb_exit(struct tegra_dc *dc); 
#define WIN_COLOR_DEPTH_YUV422R        23

#define WIN_COLOR_DEPTH_YCbCr422RA     24

#define WIN_COLOR_DEPTH_YUV422RA       25

#define WIN_COLOR_DEPTH_R4G4B4A4       27

#define WIN_COLOR_DEPTH_R5G5B5A        28

#define WIN_COLOR_DEPTH_AR5G5B5        29

#define WIN_COLOR_DEPTH_B5G5R5X1       30

#define WIN_COLOR_DEPTH_X1B5G5R5       31

#define WIN_COLOR_DEPTH_R5G5B5X1       32

#define WIN_COLOR_DEPTH_X1R5G5B5       33

#define WIN_COLOR_DEPTH_R5G6B5         34

#define WIN_COLOR_DEPTH_A8R8G8B8       35

#define WIN_COLOR_DEPTH_A8B8G8R8       36

#define WIN_COLOR_DEPTH_B8G8R8X8       37

#define WIN_COLOR_DEPTH_R8G8B8X8       38

#define WIN_COLOR_DEPTH_X8B8G8R8       65

#define WIN_COLOR_DEPTH_X8R8G8B8       66



#define DC_WIN_POSITION				0x704

#define H_POSITION(x) (((x) & 0x1fff) <<  0) /* XXX 0x7fff on Tegra186 */

drivers/gpu/drm/tegra/hub.c

+20 −2
Original line number Diff line number Diff line
@@ -26,9 +26,27 @@ 
#include "plane.h"



static const u32 tegra_shared_plane_formats[] = {

	DRM_FORMAT_XBGR8888,

	DRM_FORMAT_XRGB8888,

	DRM_FORMAT_ARGB1555,

	DRM_FORMAT_RGB565,

	DRM_FORMAT_RGBA5551,

	DRM_FORMAT_ARGB8888,

	DRM_FORMAT_ABGR8888,

	/* new on Tegra114 */

	DRM_FORMAT_ABGR4444,

	DRM_FORMAT_ABGR1555,

	DRM_FORMAT_BGRA5551,

	DRM_FORMAT_XRGB1555,

	DRM_FORMAT_RGBX5551,

	DRM_FORMAT_XBGR1555,

	DRM_FORMAT_BGRX5551,

	DRM_FORMAT_BGR565,

	DRM_FORMAT_XRGB8888,

	DRM_FORMAT_XBGR8888,

	/* planar formats */

	DRM_FORMAT_UYVY,

	DRM_FORMAT_YUYV,

	DRM_FORMAT_YUV420,

	DRM_FORMAT_YUV422,

};



static inline unsigned int tegra_plane_offset(struct tegra_shared_plane *plane,

drivers/gpu/drm/tegra/plane.c

+60 −8
Original line number Diff line number Diff line
@@ -110,24 +110,76 @@ int tegra_plane_format(u32 fourcc, u32 *format, u32 *swap) 
		*swap = BYTE_SWAP_NOSWAP;



	switch (fourcc) {

	case DRM_FORMAT_XBGR8888:

		*format = WIN_COLOR_DEPTH_R8G8B8X8;

	case DRM_FORMAT_ARGB4444:

		*format = WIN_COLOR_DEPTH_B4G4R4A4;

		break;



	case DRM_FORMAT_ABGR8888:

		*format = WIN_COLOR_DEPTH_R8G8B8A8;

	case DRM_FORMAT_ARGB1555:

		*format = WIN_COLOR_DEPTH_B5G5R5A1;

		break;



	case DRM_FORMAT_XRGB8888:

		*format = WIN_COLOR_DEPTH_B8G8R8X8;

	case DRM_FORMAT_RGB565:

		*format = WIN_COLOR_DEPTH_B5G6R5;

		break;



	case DRM_FORMAT_RGBA5551:

		*format = WIN_COLOR_DEPTH_A1B5G5R5;

		break;



	case DRM_FORMAT_ARGB8888:

		*format = WIN_COLOR_DEPTH_B8G8R8A8;

		break;



	case DRM_FORMAT_RGB565:

		*format = WIN_COLOR_DEPTH_B5G6R5;

	case DRM_FORMAT_ABGR8888:

		*format = WIN_COLOR_DEPTH_R8G8B8A8;

		break;



	case DRM_FORMAT_ABGR4444:

		*format = WIN_COLOR_DEPTH_R4G4B4A4;

		break;



	case DRM_FORMAT_ABGR1555:

		*format = WIN_COLOR_DEPTH_R5G5B5A;

		break;



	case DRM_FORMAT_BGRA5551:

		*format = WIN_COLOR_DEPTH_AR5G5B5;

		break;



	case DRM_FORMAT_XRGB1555:

		*format = WIN_COLOR_DEPTH_B5G5R5X1;

		break;



	case DRM_FORMAT_RGBX5551:

		*format = WIN_COLOR_DEPTH_X1B5G5R5;

		break;



	case DRM_FORMAT_XBGR1555:

		*format = WIN_COLOR_DEPTH_R5G5B5X1;

		break;



	case DRM_FORMAT_BGRX5551:

		*format = WIN_COLOR_DEPTH_X1R5G5B5;

		break;



	case DRM_FORMAT_BGR565:

		*format = WIN_COLOR_DEPTH_R5G6B5;

		break;



	case DRM_FORMAT_BGRA8888:

		*format = WIN_COLOR_DEPTH_A8R8G8B8;

		break;



	case DRM_FORMAT_RGBA8888:

		*format = WIN_COLOR_DEPTH_A8B8G8R8;

		break;



	case DRM_FORMAT_XRGB8888:

		*format = WIN_COLOR_DEPTH_B8G8R8X8;

		break;



	case DRM_FORMAT_XBGR8888:

		*format = WIN_COLOR_DEPTH_R8G8B8X8;

		break;



	case DRM_FORMAT_UYVY: