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Commit 50f3d740 authored by Sergei Shtylyov's avatar Sergei Shtylyov Committed by David S. Miller
Browse files

sh_eth: fix TXALCR1 offsets 



The  TXALCR1 offsets are incorrect in the register offset tables, most
probably due to copy&paste error.  Luckily, the driver never uses this
register. :-)

Fixes: 4a55530f ("net: sh_eth: modify the definitions of register")
Signed-off-by: default avatarSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 56c02902

drivers/net/ethernet/renesas/sh_eth.c

+2 −2
Original line number Diff line number Diff line
@@ -147,7 +147,7 @@ static const u16 sh_eth_offset_gigabit[SH_ETH_MAX_REGISTER_OFFSET] = { 
	[FWNLCR0]	= 0x0090,

	[FWALCR0]	= 0x0094,

	[TXNLCR1]	= 0x00a0,

	[TXALCR1]	= 0x00a0,

	[TXALCR1]	= 0x00a4,

	[RXNLCR1]	= 0x00a8,

	[RXALCR1]	= 0x00ac,

	[FWNLCR1]	= 0x00b0,
@@ -399,7 +399,7 @@ static const u16 sh_eth_offset_fast_sh3_sh2[SH_ETH_MAX_REGISTER_OFFSET] = { 
	[FWNLCR0]	= 0x0090,

	[FWALCR0]	= 0x0094,

	[TXNLCR1]	= 0x00a0,

	[TXALCR1]	= 0x00a0,

	[TXALCR1]	= 0x00a4,

	[RXNLCR1]	= 0x00a8,

	[RXALCR1]	= 0x00ac,

	[FWNLCR1]	= 0x00b0,