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Commit 5024687c authored by Phanindra Babu Pabba's avatar Phanindra Babu Pabba
Browse files

ARM: dts: msm: scuba: Add qseecom device and heap 

Add qseecom device and qseecom heap setting into
device tree to enable qseecom. Also updated TZ
app memory region's address and size.

Change-Id: I80c81213284c9b6834c8d651aac7020b6fad0ddf
parent 790aee40

qcom/scuba-ion.dtsi

+18 −0
Original line number Diff line number Diff line
@@ -19,5 +19,23 @@ 
			memory-region = <&secure_display_memory>;

			qcom,ion-heap-type = "HYP_CMA";

		};



		qcom,ion-heap@26 { /* USER CONTIG HEAP */

			reg = <26>;

			memory-region = <&user_contig_mem>;

			qcom,ion-heap-type = "DMA";

		};



		qcom,ion-heap@27 { /* QSEECOM HEAP */

			reg = <27>;

			memory-region = <&qseecom_mem>;

			qcom,ion-heap-type = "DMA";

		};



		qcom,ion-heap@19 { /* QSEECOM HEAP */

			reg = <19>;

			memory-region = <&qseecom_ta_mem>;

			qcom,ion-heap-type = "DMA";

		};

	};

};

qcom/scuba.dtsi

+61 −0
Original line number Diff line number Diff line
@@ -264,6 +264,30 @@ 
			size = <0 0x5c00000>;

		};



		user_contig_mem: user_contig_region {

			compatible = "shared-dma-pool";

			alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;

			reusable;

			alignment = <0x0 0x400000>;

			size = <0x0 0x1000000>;

		};



		qseecom_mem: qseecom_region {

			compatible = "shared-dma-pool";

			alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;

			reusable;

			alignment = <0x0 0x400000>;

			size = <0x0 0x1400000>;

		};



		qseecom_ta_mem: qseecom_ta_region {

			compatible = "shared-dma-pool";

			alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;

			reusable;

			alignment = <0x0 0x400000>;

			size = <0x0 0x1000000>;

		};



		/* global autoconfigured region for contiguous allocations */

		linux,cma {

			compatible = "shared-dma-pool";
@@ -500,6 +524,43 @@ 
		reg-names = "pshold-base", "tcsr-boot-misc-detect";

	};



	qcom_seecom: qseecom@61700000 {

		compatible = "qcom,qseecom";

		reg = <0x61700000 0x2200000>;

		reg-names = "secapp-region";

		memory-region = <&qseecom_mem>;

		qcom,hlos-num-ce-hw-instances = <1>;

		qcom,hlos-ce-hw-instance = <0>;

		qcom,qsee-ce-hw-instance = <0>;

		qcom,disk-encrypt-pipe-pair = <2>;

		qcom,support-fde;

		qcom,fde-key-size;

		qcom,appsbl-qseecom-support;

		qcom,commonlib64-loaded-by-uefi;

		qcom,msm-bus,name = "qseecom-noc";

		qcom,msm-bus,num-cases = <4>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

			<MSM_BUS_MASTER_CRYPTO_CORE0

			MSM_BUS_SLAVE_FIRST 0 0>,

			<MSM_BUS_MASTER_CRYPTO_CORE0

			MSM_BUS_SLAVE_FIRST 200000 400000>,

			<MSM_BUS_MASTER_CRYPTO_CORE0

			MSM_BUS_SLAVE_FIRST 300000 800000>,

			<MSM_BUS_MASTER_CRYPTO_CORE0

			MSM_BUS_SLAVE_FIRST 400000 1000000>;

		clock-names =

			"core_clk_src", "core_clk",

			"iface_clk", "bus_clk";

		clocks =

			<&rpmcc QSEECOM_CE1_CLK>,

			<&rpmcc QSEECOM_CE1_CLK>,

			<&rpmcc QSEECOM_CE1_CLK>,

			<&rpmcc QSEECOM_CE1_CLK>;

		qcom,ce-opp-freq = <192000000>;

		qcom,qsee-reentrancy-support = <2>;

	};



	qcom,mpm2-sleep-counter@4403000 {

		compatible = "qcom,mpm2-sleep-counter";

		reg = <0x4403000 0x1000>;