Loading drivers/bus/mhi/core/mhi_init.c +3 −0 Original line number Diff line number Diff line Loading @@ -1373,6 +1373,9 @@ int of_register_mhi_controller(struct mhi_controller *mhi_cntrl) mutex_init(&mhi_chan->mutex); init_completion(&mhi_chan->completion); rwlock_init(&mhi_chan->lock); mhi_event = &mhi_cntrl->mhi_event[mhi_chan->er_index]; mhi_chan->bei = !!(mhi_event->intmod); } if (mhi_cntrl->bounce_buf) { Loading drivers/bus/mhi/core/mhi_internal.h +1 −1 Original line number Diff line number Diff line Loading @@ -663,7 +663,6 @@ struct mhi_chan { struct mhi_ring buf_ring; struct mhi_ring tre_ring; u32 er_index; u32 intmod; enum mhi_ch_type type; enum dma_data_direction dir; struct db_cfg db_cfg; Loading @@ -671,6 +670,7 @@ struct mhi_chan { enum MHI_XFER_TYPE xfer_type; enum MHI_CH_STATE ch_state; enum MHI_EV_CCS ccs; bool bei; /* based on interrupt moderation, true if greater than 0 */ bool lpm_notify; bool configured; bool offload_ch; Loading drivers/bus/mhi/core/mhi_main.c +4 −5 Original line number Diff line number Diff line Loading @@ -396,7 +396,7 @@ int mhi_queue_skb(struct mhi_device *mhi_dev, mhi_tre->ptr = MHI_TRE_DATA_PTR(buf_info->p_addr); mhi_tre->dword[0] = MHI_TRE_DATA_DWORD0(buf_info->len); mhi_tre->dword[1] = MHI_TRE_DATA_DWORD1(1, 1, 0, 0); mhi_tre->dword[1] = MHI_TRE_DATA_DWORD1(mhi_chan->bei, 1, 0, 0); MHI_VERB("chan:%d WP:0x%llx TRE:0x%llx 0x%08x 0x%08x\n", mhi_chan->chan, (u64)mhi_to_physical(tre_ring, mhi_tre), mhi_tre->ptr, Loading Loading @@ -479,7 +479,7 @@ int mhi_queue_dma(struct mhi_device *mhi_dev, } else { mhi_tre->ptr = MHI_TRE_DATA_PTR(buf_info->p_addr); mhi_tre->dword[0] = MHI_TRE_DATA_DWORD0(buf_info->len); mhi_tre->dword[1] = MHI_TRE_DATA_DWORD1(1, 1, 0, 0); mhi_tre->dword[1] = MHI_TRE_DATA_DWORD1(mhi_chan->bei, 1, 0, 0); } MHI_VERB("chan:%d WP:0x%llx TRE:0x%llx 0x%08x 0x%08x\n", mhi_chan->chan, Loading Loading @@ -514,7 +514,7 @@ int mhi_gen_tre(struct mhi_controller *mhi_cntrl, struct mhi_ring *buf_ring, *tre_ring; struct mhi_tre *mhi_tre; struct mhi_buf_info *buf_info; int eot, eob, chain, bei; int eot, eob, chain; int ret; buf_ring = &mhi_chan->buf_ring; Loading @@ -534,12 +534,11 @@ int mhi_gen_tre(struct mhi_controller *mhi_cntrl, eob = !!(flags & MHI_EOB); eot = !!(flags & MHI_EOT); chain = !!(flags & MHI_CHAIN); bei = !!(mhi_chan->intmod); mhi_tre = tre_ring->wp; mhi_tre->ptr = MHI_TRE_DATA_PTR(buf_info->p_addr); mhi_tre->dword[0] = MHI_TRE_DATA_DWORD0(buf_len); mhi_tre->dword[1] = MHI_TRE_DATA_DWORD1(bei, eot, eob, chain); mhi_tre->dword[1] = MHI_TRE_DATA_DWORD1(mhi_chan->bei, eot, eob, chain); MHI_VERB("chan:%d WP:0x%llx TRE:0x%llx 0x%08x 0x%08x\n", mhi_chan->chan, (u64)mhi_to_physical(tre_ring, mhi_tre), mhi_tre->ptr, Loading Loading
drivers/bus/mhi/core/mhi_init.c +3 −0 Original line number Diff line number Diff line Loading @@ -1373,6 +1373,9 @@ int of_register_mhi_controller(struct mhi_controller *mhi_cntrl) mutex_init(&mhi_chan->mutex); init_completion(&mhi_chan->completion); rwlock_init(&mhi_chan->lock); mhi_event = &mhi_cntrl->mhi_event[mhi_chan->er_index]; mhi_chan->bei = !!(mhi_event->intmod); } if (mhi_cntrl->bounce_buf) { Loading
drivers/bus/mhi/core/mhi_internal.h +1 −1 Original line number Diff line number Diff line Loading @@ -663,7 +663,6 @@ struct mhi_chan { struct mhi_ring buf_ring; struct mhi_ring tre_ring; u32 er_index; u32 intmod; enum mhi_ch_type type; enum dma_data_direction dir; struct db_cfg db_cfg; Loading @@ -671,6 +670,7 @@ struct mhi_chan { enum MHI_XFER_TYPE xfer_type; enum MHI_CH_STATE ch_state; enum MHI_EV_CCS ccs; bool bei; /* based on interrupt moderation, true if greater than 0 */ bool lpm_notify; bool configured; bool offload_ch; Loading
drivers/bus/mhi/core/mhi_main.c +4 −5 Original line number Diff line number Diff line Loading @@ -396,7 +396,7 @@ int mhi_queue_skb(struct mhi_device *mhi_dev, mhi_tre->ptr = MHI_TRE_DATA_PTR(buf_info->p_addr); mhi_tre->dword[0] = MHI_TRE_DATA_DWORD0(buf_info->len); mhi_tre->dword[1] = MHI_TRE_DATA_DWORD1(1, 1, 0, 0); mhi_tre->dword[1] = MHI_TRE_DATA_DWORD1(mhi_chan->bei, 1, 0, 0); MHI_VERB("chan:%d WP:0x%llx TRE:0x%llx 0x%08x 0x%08x\n", mhi_chan->chan, (u64)mhi_to_physical(tre_ring, mhi_tre), mhi_tre->ptr, Loading Loading @@ -479,7 +479,7 @@ int mhi_queue_dma(struct mhi_device *mhi_dev, } else { mhi_tre->ptr = MHI_TRE_DATA_PTR(buf_info->p_addr); mhi_tre->dword[0] = MHI_TRE_DATA_DWORD0(buf_info->len); mhi_tre->dword[1] = MHI_TRE_DATA_DWORD1(1, 1, 0, 0); mhi_tre->dword[1] = MHI_TRE_DATA_DWORD1(mhi_chan->bei, 1, 0, 0); } MHI_VERB("chan:%d WP:0x%llx TRE:0x%llx 0x%08x 0x%08x\n", mhi_chan->chan, Loading Loading @@ -514,7 +514,7 @@ int mhi_gen_tre(struct mhi_controller *mhi_cntrl, struct mhi_ring *buf_ring, *tre_ring; struct mhi_tre *mhi_tre; struct mhi_buf_info *buf_info; int eot, eob, chain, bei; int eot, eob, chain; int ret; buf_ring = &mhi_chan->buf_ring; Loading @@ -534,12 +534,11 @@ int mhi_gen_tre(struct mhi_controller *mhi_cntrl, eob = !!(flags & MHI_EOB); eot = !!(flags & MHI_EOT); chain = !!(flags & MHI_CHAIN); bei = !!(mhi_chan->intmod); mhi_tre = tre_ring->wp; mhi_tre->ptr = MHI_TRE_DATA_PTR(buf_info->p_addr); mhi_tre->dword[0] = MHI_TRE_DATA_DWORD0(buf_len); mhi_tre->dword[1] = MHI_TRE_DATA_DWORD1(bei, eot, eob, chain); mhi_tre->dword[1] = MHI_TRE_DATA_DWORD1(mhi_chan->bei, eot, eob, chain); MHI_VERB("chan:%d WP:0x%llx TRE:0x%llx 0x%08x 0x%08x\n", mhi_chan->chan, (u64)mhi_to_physical(tre_ring, mhi_tre), mhi_tre->ptr, Loading