Commit 4fa3999e authored Apr 06, 2018 by Victor Gu Committed by Lorenzo Pieralisi Apr 16, 2018

PCI: aardvark: Set PIO_ADDR_LS correctly in advk_pcie_rd_conf()



When setting the PIO_ADDR_LS register during a configuration read, we
were properly passing the device number, function number and register
number, but not the bus number, causing issues when reading the
configuration of PCIe devices.

Fixes: 8c39d710 ("PCI: aardvark: Add Aardvark PCI host controller driver")
Cc: <stable@vger.kernel.org>
Signed-off-by: Victor Gu <xigu@marvell.com>
Reviewed-by: Wilson Ding <dingwei@marvell.com>
Reviewed-by: Nadav Haklai <nadavh@marvell.com>
[Thomas: tweak commit log.]
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>

parent 660661af

drivers/pci/host/pci-aardvark.c

+1 −3

Original line number	Diff line number	Diff line
		@@ -172,8 +172,6 @@
		#define PCIE_CONFIG_WR_TYPE0 0xa
		#define PCIE_CONFIG_WR_TYPE1 0xb

		/* PCI_BDF shifts 8bit, so we need extra 4bit shift */
		#define PCIE_BDF(dev) (dev << 4)
		#define PCIE_CONF_BUS(bus) (((bus) & 0xff) << 20)
		#define PCIE_CONF_DEV(dev) (((dev) & 0x1f) << 15)
		#define PCIE_CONF_FUNC(fun) (((fun) & 0x7) << 12)
		@@ -456,7 +454,7 @@ static int advk_pcie_rd_conf(struct pci_bus *bus, u32 devfn,
		advk_writel(pcie, reg, PIO_CTRL);

		/* Program the address registers */
		reg = PCIE_BDF(devfn) \| PCIE_CONF_REG(where);
		reg = PCIE_CONF_ADDR(bus->number, devfn, where);
		advk_writel(pcie, reg, PIO_ADDR_LS);
		advk_writel(pcie, 0, PIO_ADDR_MS);