Loading drivers/clk/clk.c +4 −2 Original line number Diff line number Diff line Loading @@ -724,7 +724,7 @@ static int clk_unvote_vdd_level(struct clk_vdd_class *vdd_class, int level) /* * Vote for a voltage level corresponding to a clock's rate. */ static int clk_vote_rate_vdd(struct clk_core *core, unsigned long rate) int clk_vote_rate_vdd(struct clk_core *core, unsigned long rate) { int level; Loading @@ -737,11 +737,12 @@ static int clk_vote_rate_vdd(struct clk_core *core, unsigned long rate) return clk_vote_vdd_level(core->vdd_class, level); } EXPORT_SYMBOL_GPL(clk_vote_rate_vdd); /* * Remove vote for a voltage level corresponding to a clock's rate. */ static void clk_unvote_rate_vdd(struct clk_core *core, unsigned long rate) void clk_unvote_rate_vdd(struct clk_core *core, unsigned long rate) { int level; Loading @@ -754,6 +755,7 @@ static void clk_unvote_rate_vdd(struct clk_core *core, unsigned long rate) clk_unvote_vdd_level(core->vdd_class, level); } EXPORT_SYMBOL_GPL(clk_unvote_rate_vdd); static bool clk_is_rate_level_valid(struct clk_core *core, unsigned long rate) { Loading include/linux/clk-provider.h +2 −0 Original line number Diff line number Diff line Loading @@ -889,6 +889,8 @@ void clk_hw_set_rate_range(struct clk_hw *hw, unsigned long min_rate, unsigned long clk_aggregate_rate(struct clk_hw *hw, const struct clk_core *parent); int clk_vote_rate_vdd(struct clk_core *core, unsigned long rate); void clk_unvote_rate_vdd(struct clk_core *core, unsigned long rate); static inline void __clk_hw_set_clk(struct clk_hw *dst, struct clk_hw *src) { Loading Loading
drivers/clk/clk.c +4 −2 Original line number Diff line number Diff line Loading @@ -724,7 +724,7 @@ static int clk_unvote_vdd_level(struct clk_vdd_class *vdd_class, int level) /* * Vote for a voltage level corresponding to a clock's rate. */ static int clk_vote_rate_vdd(struct clk_core *core, unsigned long rate) int clk_vote_rate_vdd(struct clk_core *core, unsigned long rate) { int level; Loading @@ -737,11 +737,12 @@ static int clk_vote_rate_vdd(struct clk_core *core, unsigned long rate) return clk_vote_vdd_level(core->vdd_class, level); } EXPORT_SYMBOL_GPL(clk_vote_rate_vdd); /* * Remove vote for a voltage level corresponding to a clock's rate. */ static void clk_unvote_rate_vdd(struct clk_core *core, unsigned long rate) void clk_unvote_rate_vdd(struct clk_core *core, unsigned long rate) { int level; Loading @@ -754,6 +755,7 @@ static void clk_unvote_rate_vdd(struct clk_core *core, unsigned long rate) clk_unvote_vdd_level(core->vdd_class, level); } EXPORT_SYMBOL_GPL(clk_unvote_rate_vdd); static bool clk_is_rate_level_valid(struct clk_core *core, unsigned long rate) { Loading
include/linux/clk-provider.h +2 −0 Original line number Diff line number Diff line Loading @@ -889,6 +889,8 @@ void clk_hw_set_rate_range(struct clk_hw *hw, unsigned long min_rate, unsigned long clk_aggregate_rate(struct clk_hw *hw, const struct clk_core *parent); int clk_vote_rate_vdd(struct clk_core *core, unsigned long rate); void clk_unvote_rate_vdd(struct clk_core *core, unsigned long rate); static inline void __clk_hw_set_clk(struct clk_hw *dst, struct clk_hw *src) { Loading