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Commit 4e3c5d7e authored by Philipp Zabel's avatar Philipp Zabel
Browse files

gpu: ipu-v3: Allow negative offsets for interlaced scanning 



The IPU also supports interlaced buffers that start with the bottom field.
To achieve this, the the base address EBA has to be increased by a stride
length and the interlace offset ILO has to be set to the negative stride.

Signed-off-by: default avatarPhilipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: default avatarSteve Longerbeam <steve_longerbeam@mentor.com>
parent 1e6a1495

drivers/gpu/ipu-v3/ipu-cpmem.c

+13 −2
Original line number Diff line number Diff line
@@ -269,9 +269,20 @@ EXPORT_SYMBOL_GPL(ipu_cpmem_set_uv_offset); 


void ipu_cpmem_interlaced_scan(struct ipuv3_channel *ch, int stride)

{

	u32 ilo, sly;



	if (stride < 0) {

		stride = -stride;

		ilo = 0x100000 - (stride / 8);

	} else {

		ilo = stride / 8;

	}



	sly = (stride * 2) - 1;



	ipu_ch_param_write_field(ch, IPU_FIELD_SO, 1);

	ipu_ch_param_write_field(ch, IPU_FIELD_ILO, stride / 8);

	ipu_ch_param_write_field(ch, IPU_FIELD_SLY, (stride * 2) - 1);

	ipu_ch_param_write_field(ch, IPU_FIELD_ILO, ilo);

	ipu_ch_param_write_field(ch, IPU_FIELD_SLY, sly);

};

EXPORT_SYMBOL_GPL(ipu_cpmem_interlaced_scan);