Loading drivers/cam_isp/isp_hw_mgr/isp_hw/tfe_hw/cam_tfe_bus.c +15 −5 Original line number Diff line number Diff line Loading @@ -77,6 +77,7 @@ struct cam_tfe_bus_common_data { struct cam_tfe_bus_wm_resource_data { uint32_t index; uint32_t out_id; struct cam_tfe_bus_common_data *common_data; struct cam_tfe_bus_reg_offset_bus_client *hw_regs; Loading Loading @@ -628,6 +629,7 @@ static int cam_tfe_bus_acquire_wm( rsrc_data->height = out_port_info->height; rsrc_data->stride = out_port_info->stride; rsrc_data->mode = out_port_info->wm_mode; rsrc_data->out_id = tfe_out_res_id; /* * Store the acquire width, height separately. For frame based ports Loading @@ -641,14 +643,16 @@ static int cam_tfe_bus_acquire_wm( /* Set WM offset value to default */ rsrc_data->offset = 0; if (rsrc_data->index > 6) { if ((rsrc_data->index > 6) && (tfe_out_res_id != CAM_TFE_BUS_TFE_OUT_PDAF)) { /* WM 7-9 refers to RDI 0/ RDI 1/RDI 2 */ rc = cam_tfe_bus_acquire_rdi_wm(rsrc_data); if (rc) return rc; } else if (rsrc_data->index == 0 || rsrc_data->index == 1) { /* WM 0 FULL_OUT */ } else if (rsrc_data->index == 0 || rsrc_data->index == 1 || (tfe_out_res_id == CAM_TFE_BUS_TFE_OUT_PDAF)) { /* WM 0 FULL_OUT WM 1 IDEAL RAW WM9 for pdaf */ switch (rsrc_data->format) { case CAM_FORMAT_MIPI_RAW_8: rsrc_data->pack_fmt = 0x1; Loading Loading @@ -744,9 +748,14 @@ static int cam_tfe_bus_start_wm(struct cam_isp_resource_node *wm_res) /* Configure stride for RDIs on full TFE and TFE lite */ if ((rsrc_data->index > 6) && (rsrc_data->mode != CAM_ISP_TFE_WM_LINE_BASED_MODE)) ((rsrc_data->mode != CAM_ISP_TFE_WM_LINE_BASED_MODE) && (rsrc_data->out_id != CAM_TFE_BUS_TFE_OUT_PDAF))) { cam_io_w_mb(rsrc_data->stride, (common_data->mem_base + rsrc_data->hw_regs->image_cfg_2)); CAM_DBG(CAM_ISP, "WM:%d configure stride reg :0x%x", rsrc_data->index, rsrc_data->stride); } /* Enable WM */ cam_io_w_mb(rsrc_data->en_cfg, common_data->mem_base + Loading Loading @@ -1885,7 +1894,8 @@ static int cam_tfe_bus_update_wm(void *priv, void *cmd_args, wm_data->index, reg_val_pair[j-1]); if ((wm_data->index < 7) || ((wm_data->index >= 7) && (wm_data->mode == CAM_ISP_TFE_WM_LINE_BASED_MODE))) { (wm_data->mode == CAM_ISP_TFE_WM_LINE_BASED_MODE)) || (wm_data->out_id == CAM_TFE_BUS_TFE_OUT_PDAF)) { CAM_TFE_ADD_REG_VAL_PAIR(reg_val_pair, j, wm_data->hw_regs->image_cfg_2, io_cfg->planes[i].plane_stride); Loading drivers/cam_isp/isp_hw_mgr/isp_hw/tfe_hw/cam_tfe_core.c +0 −17 Original line number Diff line number Diff line Loading @@ -1922,23 +1922,6 @@ static int cam_tfe_camif_resource_start( return -ENODEV; } /* Camif module config */ val = cam_io_r(rsrc_data->mem_base + rsrc_data->camif_reg->module_cfg); val &= ~(rsrc_data->reg_data->pixel_pattern_mask); val |= (rsrc_data->pix_pattern << rsrc_data->reg_data->pixel_pattern_shift); val |= (1 << rsrc_data->reg_data->module_enable_shift); val |= (1 << rsrc_data->reg_data->pix_out_enable_shift); if (rsrc_data->camif_pd_enable) val |= (1 << rsrc_data->reg_data->pdaf_output_enable_shift); cam_io_w_mb(val, rsrc_data->mem_base + rsrc_data->camif_reg->module_cfg); CAM_DBG(CAM_ISP, "TFE:%d camif module config val:%d", core_info->core_index, val); /* Config tfe core*/ val = 0; if (rsrc_data->sync_mode == CAM_ISP_HW_SYNC_SLAVE) Loading drivers/cam_ope/cam_ope_context.c +15 −1 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2019, The Linux Foundation. All rights reserved. * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. */ #include <linux/debugfs.h> Loading Loading @@ -122,6 +122,18 @@ static int __cam_ope_flush_dev_in_ready(struct cam_context *ctx, return rc; } static int __cam_ope_dump_dev_in_ready(struct cam_context *ctx, struct cam_dump_req_cmd *cmd) { int rc; rc = cam_context_dump_dev_to_hw(ctx, cmd); if (rc) CAM_ERR(CAM_OPE, "Failed to dump device"); return rc; } static int __cam_ope_config_dev_in_ready(struct cam_context *ctx, struct cam_config_dev_cmd *cmd) { Loading Loading @@ -205,6 +217,7 @@ static struct cam_ctx_ops .start_dev = __cam_ope_start_dev_in_acquired, .config_dev = __cam_ope_config_dev_in_ready, .flush_dev = __cam_ope_flush_dev_in_ready, .dump_dev = __cam_ope_dump_dev_in_ready, }, .crm_ops = {}, .irq_ops = __cam_ope_handle_buf_done_in_ready, Loading @@ -217,6 +230,7 @@ static struct cam_ctx_ops .release_dev = __cam_ope_release_dev_in_ready, .config_dev = __cam_ope_config_dev_in_ready, .flush_dev = __cam_ope_flush_dev_in_ready, .dump_dev = __cam_ope_dump_dev_in_ready, }, .crm_ops = {}, .irq_ops = __cam_ope_handle_buf_done_in_ready, Loading drivers/cam_ope/ope_hw_mgr/cam_ope_hw_mgr.c +98 −8 Original line number Diff line number Diff line Loading @@ -96,12 +96,19 @@ static int cam_ope_mgr_process_cmd(void *priv, void *data) task_data = (struct ope_cmd_work_data *)data; cdm_cmd = task_data->data; CAM_DBG(CAM_OPE, "cam_cdm_submit_bls: handle 0x%x, ctx_id %d req %d cookie %d", ctx_data->ope_cdm.cdm_handle, ctx_data->ctx_id, task_data->req_id, cdm_cmd->cookie); if (!cdm_cmd) { CAM_ERR(CAM_OPE, "Invalid params%pK", cdm_cmd); return -EINVAL; } mutex_lock(&hw_mgr->hw_mgr_mutex); if (ctx_data->ctx_state != OPE_CTX_STATE_ACQUIRED) { mutex_unlock(&hw_mgr->hw_mgr_mutex); CAM_ERR(CAM_OPE, "ctx id :%u is not in use", ctx_data->ctx_id); return -EINVAL; } if (task_data->req_id <= ctx_data->last_flush_req) { CAM_WARN(CAM_OPE, "request %lld has been flushed, reject packet", Loading @@ -110,6 +117,11 @@ static int cam_ope_mgr_process_cmd(void *priv, void *data) return -EINVAL; } CAM_DBG(CAM_OPE, "cam_cdm_submit_bls: handle 0x%x, ctx_id %d req %d cookie %d", ctx_data->ope_cdm.cdm_handle, ctx_data->ctx_id, task_data->req_id, cdm_cmd->cookie); if (task_data->req_id > ctx_data->last_flush_req) ctx_data->last_flush_req = 0; Loading Loading @@ -1020,8 +1032,11 @@ static int cam_ope_get_lower_clk_rate(struct cam_ope_hw_mgr *hw_mgr, i = cam_ope_get_actual_clk_rate_idx(ctx_data, base_clk); if (i > 0) while (i > 0) { if (ctx_data->clk_info.clk_rate[i - 1]) return ctx_data->clk_info.clk_rate[i - 1]; i--; } CAM_DBG(CAM_OPE, "Already clk at lower level"); Loading @@ -1035,8 +1050,11 @@ static int cam_ope_get_next_clk_rate(struct cam_ope_hw_mgr *hw_mgr, i = cam_ope_get_actual_clk_rate_idx(ctx_data, base_clk); if (i < CAM_MAX_VOTE - 1) while (i < CAM_MAX_VOTE - 1) { if (ctx_data->clk_info.clk_rate[i + 1]) return ctx_data->clk_info.clk_rate[i + 1]; i++; } CAM_DBG(CAM_OPE, "Already clk at higher level"); Loading Loading @@ -3302,6 +3320,7 @@ static int cam_ope_mgr_config_hw(void *hw_priv, void *hw_config_args) cdm_cmd->cookie = ope_req->req_idx; cam_ope_mgr_ope_clk_update(hw_mgr, ctx_data, ope_req->req_idx); ctx_data->req_list[ope_req->req_idx]->submit_timestamp = ktime_get(); if (ope_req->request_id <= ctx_data->last_flush_req) CAM_WARN(CAM_OPE, Loading Loading @@ -3429,6 +3448,76 @@ static int cam_ope_mgr_flush_all(struct cam_ope_ctx *ctx_data, return rc; } static int cam_ope_mgr_hw_dump(void *hw_priv, void *hw_dump_args) { struct cam_ope_ctx *ctx_data; struct cam_ope_hw_mgr *hw_mgr = hw_priv; struct cam_hw_dump_args *dump_args; int idx; ktime_t cur_time; struct timespec64 cur_ts, req_ts; uint64_t diff; if ((!hw_priv) || (!hw_dump_args)) { CAM_ERR(CAM_OPE, "Invalid params %pK %pK", hw_priv, hw_dump_args); return -EINVAL; } dump_args = (struct cam_hw_dump_args *)hw_dump_args; ctx_data = dump_args->ctxt_to_hw_map; if (!ctx_data) { CAM_ERR(CAM_OPE, "Invalid context"); return -EINVAL; } mutex_lock(&hw_mgr->hw_mgr_mutex); CAM_INFO(CAM_OPE, "Req %lld", dump_args->request_id); for (idx = 0; idx < CAM_CTX_REQ_MAX; idx++) { if (!ctx_data->req_list[idx]) continue; if (ctx_data->req_list[idx]->request_id == dump_args->request_id) break; } /* no matching request found */ if (idx == CAM_CTX_REQ_MAX) { mutex_unlock(&hw_mgr->hw_mgr_mutex); return 0; } cur_time = ktime_get(); diff = ktime_us_delta(ctx_data->req_list[idx]->submit_timestamp, cur_time); cur_ts = ktime_to_timespec64(cur_time); req_ts = ktime_to_timespec64(ctx_data->req_list[idx]->submit_timestamp); if (diff < (OPE_REQUEST_TIMEOUT * 1000)) { CAM_INFO(CAM_OPE, "No Error req %llu %ld:%06ld %ld:%06ld", dump_args->request_id, req_ts.tv_sec, req_ts.tv_nsec/NSEC_PER_USEC, cur_ts.tv_sec, cur_ts.tv_nsec/NSEC_PER_USEC); mutex_unlock(&hw_mgr->hw_mgr_mutex); return 0; } CAM_ERR(CAM_OPE, "Error req %llu %ld:%06ld %ld:%06ld", dump_args->request_id, req_ts.tv_sec, req_ts.tv_nsec/NSEC_PER_USEC, cur_ts.tv_sec, cur_ts.tv_nsec/NSEC_PER_USEC); mutex_unlock(&hw_mgr->hw_mgr_mutex); return 0; } static int cam_ope_mgr_hw_flush(void *hw_priv, void *hw_flush_args) { struct cam_hw_flush_args *flush_args = hw_flush_args; Loading Loading @@ -3703,6 +3792,7 @@ int cam_ope_hw_mgr_init(struct device_node *of_node, uint64_t *hw_mgr_hdl, hw_mgr_intf->hw_open = cam_ope_mgr_hw_open_u; hw_mgr_intf->hw_close = cam_ope_mgr_hw_close_u; hw_mgr_intf->hw_flush = cam_ope_mgr_hw_flush; hw_mgr_intf->hw_dump = cam_ope_mgr_hw_dump; ope_hw_mgr->secure_mode = false; mutex_init(&ope_hw_mgr->hw_mgr_mutex); Loading drivers/cam_ope/ope_hw_mgr/cam_ope_hw_mgr.h +2 −2 Original line number Diff line number Diff line Loading @@ -62,8 +62,6 @@ #define OPE_DEVICE_IDLE_TIMEOUT 400 #define OPE_REQUEST_TIMEOUT 200 /** * struct cam_ope_clk_bw_request_v2 * @budget_ns: Time required to process frame Loading Loading @@ -390,6 +388,7 @@ struct ope_io_buf { * @clk_info: Clock Info V1 * @clk_info_v2: Clock Info V2 * @hang_data: Debug data for HW error * @submit_timestamp: Submit timestamp to hw */ struct cam_ope_request { uint64_t request_id; Loading @@ -410,6 +409,7 @@ struct cam_ope_request { struct cam_ope_clk_bw_request clk_info; struct cam_ope_clk_bw_req_internal_v2 clk_info_v2; struct cam_hw_mgr_dump_pf_data hang_data; ktime_t submit_timestamp; }; /** Loading Loading
drivers/cam_isp/isp_hw_mgr/isp_hw/tfe_hw/cam_tfe_bus.c +15 −5 Original line number Diff line number Diff line Loading @@ -77,6 +77,7 @@ struct cam_tfe_bus_common_data { struct cam_tfe_bus_wm_resource_data { uint32_t index; uint32_t out_id; struct cam_tfe_bus_common_data *common_data; struct cam_tfe_bus_reg_offset_bus_client *hw_regs; Loading Loading @@ -628,6 +629,7 @@ static int cam_tfe_bus_acquire_wm( rsrc_data->height = out_port_info->height; rsrc_data->stride = out_port_info->stride; rsrc_data->mode = out_port_info->wm_mode; rsrc_data->out_id = tfe_out_res_id; /* * Store the acquire width, height separately. For frame based ports Loading @@ -641,14 +643,16 @@ static int cam_tfe_bus_acquire_wm( /* Set WM offset value to default */ rsrc_data->offset = 0; if (rsrc_data->index > 6) { if ((rsrc_data->index > 6) && (tfe_out_res_id != CAM_TFE_BUS_TFE_OUT_PDAF)) { /* WM 7-9 refers to RDI 0/ RDI 1/RDI 2 */ rc = cam_tfe_bus_acquire_rdi_wm(rsrc_data); if (rc) return rc; } else if (rsrc_data->index == 0 || rsrc_data->index == 1) { /* WM 0 FULL_OUT */ } else if (rsrc_data->index == 0 || rsrc_data->index == 1 || (tfe_out_res_id == CAM_TFE_BUS_TFE_OUT_PDAF)) { /* WM 0 FULL_OUT WM 1 IDEAL RAW WM9 for pdaf */ switch (rsrc_data->format) { case CAM_FORMAT_MIPI_RAW_8: rsrc_data->pack_fmt = 0x1; Loading Loading @@ -744,9 +748,14 @@ static int cam_tfe_bus_start_wm(struct cam_isp_resource_node *wm_res) /* Configure stride for RDIs on full TFE and TFE lite */ if ((rsrc_data->index > 6) && (rsrc_data->mode != CAM_ISP_TFE_WM_LINE_BASED_MODE)) ((rsrc_data->mode != CAM_ISP_TFE_WM_LINE_BASED_MODE) && (rsrc_data->out_id != CAM_TFE_BUS_TFE_OUT_PDAF))) { cam_io_w_mb(rsrc_data->stride, (common_data->mem_base + rsrc_data->hw_regs->image_cfg_2)); CAM_DBG(CAM_ISP, "WM:%d configure stride reg :0x%x", rsrc_data->index, rsrc_data->stride); } /* Enable WM */ cam_io_w_mb(rsrc_data->en_cfg, common_data->mem_base + Loading Loading @@ -1885,7 +1894,8 @@ static int cam_tfe_bus_update_wm(void *priv, void *cmd_args, wm_data->index, reg_val_pair[j-1]); if ((wm_data->index < 7) || ((wm_data->index >= 7) && (wm_data->mode == CAM_ISP_TFE_WM_LINE_BASED_MODE))) { (wm_data->mode == CAM_ISP_TFE_WM_LINE_BASED_MODE)) || (wm_data->out_id == CAM_TFE_BUS_TFE_OUT_PDAF)) { CAM_TFE_ADD_REG_VAL_PAIR(reg_val_pair, j, wm_data->hw_regs->image_cfg_2, io_cfg->planes[i].plane_stride); Loading
drivers/cam_isp/isp_hw_mgr/isp_hw/tfe_hw/cam_tfe_core.c +0 −17 Original line number Diff line number Diff line Loading @@ -1922,23 +1922,6 @@ static int cam_tfe_camif_resource_start( return -ENODEV; } /* Camif module config */ val = cam_io_r(rsrc_data->mem_base + rsrc_data->camif_reg->module_cfg); val &= ~(rsrc_data->reg_data->pixel_pattern_mask); val |= (rsrc_data->pix_pattern << rsrc_data->reg_data->pixel_pattern_shift); val |= (1 << rsrc_data->reg_data->module_enable_shift); val |= (1 << rsrc_data->reg_data->pix_out_enable_shift); if (rsrc_data->camif_pd_enable) val |= (1 << rsrc_data->reg_data->pdaf_output_enable_shift); cam_io_w_mb(val, rsrc_data->mem_base + rsrc_data->camif_reg->module_cfg); CAM_DBG(CAM_ISP, "TFE:%d camif module config val:%d", core_info->core_index, val); /* Config tfe core*/ val = 0; if (rsrc_data->sync_mode == CAM_ISP_HW_SYNC_SLAVE) Loading
drivers/cam_ope/cam_ope_context.c +15 −1 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2019, The Linux Foundation. All rights reserved. * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. */ #include <linux/debugfs.h> Loading Loading @@ -122,6 +122,18 @@ static int __cam_ope_flush_dev_in_ready(struct cam_context *ctx, return rc; } static int __cam_ope_dump_dev_in_ready(struct cam_context *ctx, struct cam_dump_req_cmd *cmd) { int rc; rc = cam_context_dump_dev_to_hw(ctx, cmd); if (rc) CAM_ERR(CAM_OPE, "Failed to dump device"); return rc; } static int __cam_ope_config_dev_in_ready(struct cam_context *ctx, struct cam_config_dev_cmd *cmd) { Loading Loading @@ -205,6 +217,7 @@ static struct cam_ctx_ops .start_dev = __cam_ope_start_dev_in_acquired, .config_dev = __cam_ope_config_dev_in_ready, .flush_dev = __cam_ope_flush_dev_in_ready, .dump_dev = __cam_ope_dump_dev_in_ready, }, .crm_ops = {}, .irq_ops = __cam_ope_handle_buf_done_in_ready, Loading @@ -217,6 +230,7 @@ static struct cam_ctx_ops .release_dev = __cam_ope_release_dev_in_ready, .config_dev = __cam_ope_config_dev_in_ready, .flush_dev = __cam_ope_flush_dev_in_ready, .dump_dev = __cam_ope_dump_dev_in_ready, }, .crm_ops = {}, .irq_ops = __cam_ope_handle_buf_done_in_ready, Loading
drivers/cam_ope/ope_hw_mgr/cam_ope_hw_mgr.c +98 −8 Original line number Diff line number Diff line Loading @@ -96,12 +96,19 @@ static int cam_ope_mgr_process_cmd(void *priv, void *data) task_data = (struct ope_cmd_work_data *)data; cdm_cmd = task_data->data; CAM_DBG(CAM_OPE, "cam_cdm_submit_bls: handle 0x%x, ctx_id %d req %d cookie %d", ctx_data->ope_cdm.cdm_handle, ctx_data->ctx_id, task_data->req_id, cdm_cmd->cookie); if (!cdm_cmd) { CAM_ERR(CAM_OPE, "Invalid params%pK", cdm_cmd); return -EINVAL; } mutex_lock(&hw_mgr->hw_mgr_mutex); if (ctx_data->ctx_state != OPE_CTX_STATE_ACQUIRED) { mutex_unlock(&hw_mgr->hw_mgr_mutex); CAM_ERR(CAM_OPE, "ctx id :%u is not in use", ctx_data->ctx_id); return -EINVAL; } if (task_data->req_id <= ctx_data->last_flush_req) { CAM_WARN(CAM_OPE, "request %lld has been flushed, reject packet", Loading @@ -110,6 +117,11 @@ static int cam_ope_mgr_process_cmd(void *priv, void *data) return -EINVAL; } CAM_DBG(CAM_OPE, "cam_cdm_submit_bls: handle 0x%x, ctx_id %d req %d cookie %d", ctx_data->ope_cdm.cdm_handle, ctx_data->ctx_id, task_data->req_id, cdm_cmd->cookie); if (task_data->req_id > ctx_data->last_flush_req) ctx_data->last_flush_req = 0; Loading Loading @@ -1020,8 +1032,11 @@ static int cam_ope_get_lower_clk_rate(struct cam_ope_hw_mgr *hw_mgr, i = cam_ope_get_actual_clk_rate_idx(ctx_data, base_clk); if (i > 0) while (i > 0) { if (ctx_data->clk_info.clk_rate[i - 1]) return ctx_data->clk_info.clk_rate[i - 1]; i--; } CAM_DBG(CAM_OPE, "Already clk at lower level"); Loading @@ -1035,8 +1050,11 @@ static int cam_ope_get_next_clk_rate(struct cam_ope_hw_mgr *hw_mgr, i = cam_ope_get_actual_clk_rate_idx(ctx_data, base_clk); if (i < CAM_MAX_VOTE - 1) while (i < CAM_MAX_VOTE - 1) { if (ctx_data->clk_info.clk_rate[i + 1]) return ctx_data->clk_info.clk_rate[i + 1]; i++; } CAM_DBG(CAM_OPE, "Already clk at higher level"); Loading Loading @@ -3302,6 +3320,7 @@ static int cam_ope_mgr_config_hw(void *hw_priv, void *hw_config_args) cdm_cmd->cookie = ope_req->req_idx; cam_ope_mgr_ope_clk_update(hw_mgr, ctx_data, ope_req->req_idx); ctx_data->req_list[ope_req->req_idx]->submit_timestamp = ktime_get(); if (ope_req->request_id <= ctx_data->last_flush_req) CAM_WARN(CAM_OPE, Loading Loading @@ -3429,6 +3448,76 @@ static int cam_ope_mgr_flush_all(struct cam_ope_ctx *ctx_data, return rc; } static int cam_ope_mgr_hw_dump(void *hw_priv, void *hw_dump_args) { struct cam_ope_ctx *ctx_data; struct cam_ope_hw_mgr *hw_mgr = hw_priv; struct cam_hw_dump_args *dump_args; int idx; ktime_t cur_time; struct timespec64 cur_ts, req_ts; uint64_t diff; if ((!hw_priv) || (!hw_dump_args)) { CAM_ERR(CAM_OPE, "Invalid params %pK %pK", hw_priv, hw_dump_args); return -EINVAL; } dump_args = (struct cam_hw_dump_args *)hw_dump_args; ctx_data = dump_args->ctxt_to_hw_map; if (!ctx_data) { CAM_ERR(CAM_OPE, "Invalid context"); return -EINVAL; } mutex_lock(&hw_mgr->hw_mgr_mutex); CAM_INFO(CAM_OPE, "Req %lld", dump_args->request_id); for (idx = 0; idx < CAM_CTX_REQ_MAX; idx++) { if (!ctx_data->req_list[idx]) continue; if (ctx_data->req_list[idx]->request_id == dump_args->request_id) break; } /* no matching request found */ if (idx == CAM_CTX_REQ_MAX) { mutex_unlock(&hw_mgr->hw_mgr_mutex); return 0; } cur_time = ktime_get(); diff = ktime_us_delta(ctx_data->req_list[idx]->submit_timestamp, cur_time); cur_ts = ktime_to_timespec64(cur_time); req_ts = ktime_to_timespec64(ctx_data->req_list[idx]->submit_timestamp); if (diff < (OPE_REQUEST_TIMEOUT * 1000)) { CAM_INFO(CAM_OPE, "No Error req %llu %ld:%06ld %ld:%06ld", dump_args->request_id, req_ts.tv_sec, req_ts.tv_nsec/NSEC_PER_USEC, cur_ts.tv_sec, cur_ts.tv_nsec/NSEC_PER_USEC); mutex_unlock(&hw_mgr->hw_mgr_mutex); return 0; } CAM_ERR(CAM_OPE, "Error req %llu %ld:%06ld %ld:%06ld", dump_args->request_id, req_ts.tv_sec, req_ts.tv_nsec/NSEC_PER_USEC, cur_ts.tv_sec, cur_ts.tv_nsec/NSEC_PER_USEC); mutex_unlock(&hw_mgr->hw_mgr_mutex); return 0; } static int cam_ope_mgr_hw_flush(void *hw_priv, void *hw_flush_args) { struct cam_hw_flush_args *flush_args = hw_flush_args; Loading Loading @@ -3703,6 +3792,7 @@ int cam_ope_hw_mgr_init(struct device_node *of_node, uint64_t *hw_mgr_hdl, hw_mgr_intf->hw_open = cam_ope_mgr_hw_open_u; hw_mgr_intf->hw_close = cam_ope_mgr_hw_close_u; hw_mgr_intf->hw_flush = cam_ope_mgr_hw_flush; hw_mgr_intf->hw_dump = cam_ope_mgr_hw_dump; ope_hw_mgr->secure_mode = false; mutex_init(&ope_hw_mgr->hw_mgr_mutex); Loading
drivers/cam_ope/ope_hw_mgr/cam_ope_hw_mgr.h +2 −2 Original line number Diff line number Diff line Loading @@ -62,8 +62,6 @@ #define OPE_DEVICE_IDLE_TIMEOUT 400 #define OPE_REQUEST_TIMEOUT 200 /** * struct cam_ope_clk_bw_request_v2 * @budget_ns: Time required to process frame Loading Loading @@ -390,6 +388,7 @@ struct ope_io_buf { * @clk_info: Clock Info V1 * @clk_info_v2: Clock Info V2 * @hang_data: Debug data for HW error * @submit_timestamp: Submit timestamp to hw */ struct cam_ope_request { uint64_t request_id; Loading @@ -410,6 +409,7 @@ struct cam_ope_request { struct cam_ope_clk_bw_request clk_info; struct cam_ope_clk_bw_req_internal_v2 clk_info_v2; struct cam_hw_mgr_dump_pf_data hang_data; ktime_t submit_timestamp; }; /** Loading