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Commit 4d1fa22f authored by Rodrigo Vivi's avatar Rodrigo Vivi
Browse files

drm/i915/psr: Re-create a hsw_psr_enable_source. 



This sequence is part of enable source anyways, but they
only need to be executed once and not on every activation,
So let's re-create hsw_enable_source.

v2: Avoid changing order here to avoid changing behaviour
    as suggested by Jani.
v3: Rebased on top of commit d2419ffc ("drm/i915: Plumb
    crtc_state to PSR enable/disable")

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Vathsala Nagaraju <vathsala.nagaraju@intel.com>
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: default avatarDhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170907230041.22978-7-rodrigo.vivi@intel.com
parent 2ce4df87

drivers/gpu/drm/i915/intel_psr.c

+37 −33
Original line number Diff line number Diff line
@@ -471,6 +471,42 @@ static void intel_psr_activate(struct intel_dp *intel_dp) 
	dev_priv->psr.active = true;

}



static void hsw_psr_enable_source(struct intel_dp *intel_dp,

				  const struct intel_crtc_state *crtc_state)

{

	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);

	struct drm_device *dev = dig_port->base.base.dev;

	struct drm_i915_private *dev_priv = to_i915(dev);

	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;

	u32 chicken;



	if (dev_priv->psr.psr2_support) {

		chicken = PSR2_VSC_ENABLE_PROG_HEADER;

		if (dev_priv->psr.y_cord_support)

			chicken |= PSR2_ADD_VERTICAL_LINE_COUNT;

		I915_WRITE(CHICKEN_TRANS(cpu_transcoder), chicken);



		I915_WRITE(EDP_PSR_DEBUG_CTL,

			   EDP_PSR_DEBUG_MASK_MEMUP |

			   EDP_PSR_DEBUG_MASK_HPD |

			   EDP_PSR_DEBUG_MASK_LPSP |

			   EDP_PSR_DEBUG_MASK_MAX_SLEEP |

			   EDP_PSR_DEBUG_MASK_DISP_REG_WRITE);

	} else {

		/*

		 * Per Spec: Avoid continuous PSR exit by masking MEMUP

		 * and HPD. also mask LPSP to avoid dependency on other

		 * drivers that might block runtime_pm besides

		 * preventing  other hw tracking issues now we can rely

		 * on frontbuffer tracking.

		 */

		I915_WRITE(EDP_PSR_DEBUG_CTL,

			   EDP_PSR_DEBUG_MASK_MEMUP |

			   EDP_PSR_DEBUG_MASK_HPD |

			   EDP_PSR_DEBUG_MASK_LPSP);

	}

}



/**

 * intel_psr_enable - Enable PSR

 * @intel_dp: Intel DP
@@ -484,8 +520,6 @@ void intel_psr_enable(struct intel_dp *intel_dp, 
	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);

	struct drm_device *dev = intel_dig_port->base.base.dev;

	struct drm_i915_private *dev_priv = to_i915(dev);

	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;

	u32 chicken;



	if (!HAS_PSR(dev_priv))

		return;
@@ -510,31 +544,7 @@ void intel_psr_enable(struct intel_dp *intel_dp, 


		hsw_psr_setup_vsc(intel_dp, crtc_state);



		if (dev_priv->psr.psr2_support) {

			chicken = PSR2_VSC_ENABLE_PROG_HEADER;

			if (dev_priv->psr.y_cord_support)

				chicken |= PSR2_ADD_VERTICAL_LINE_COUNT;

			I915_WRITE(CHICKEN_TRANS(cpu_transcoder), chicken);



			I915_WRITE(EDP_PSR_DEBUG_CTL,

				   EDP_PSR_DEBUG_MASK_MEMUP |

				   EDP_PSR_DEBUG_MASK_HPD |

				   EDP_PSR_DEBUG_MASK_LPSP |

				   EDP_PSR_DEBUG_MASK_MAX_SLEEP |

				   EDP_PSR_DEBUG_MASK_DISP_REG_WRITE);

		} else {

			/*

			 * Per Spec: Avoid continuous PSR exit by masking MEMUP

			 * and HPD. also mask LPSP to avoid dependency on other

			 * drivers that might block runtime_pm besides

			 * preventing  other hw tracking issues now we can rely

			 * on frontbuffer tracking.

			 */

			I915_WRITE(EDP_PSR_DEBUG_CTL,

				   EDP_PSR_DEBUG_MASK_MEMUP |

				   EDP_PSR_DEBUG_MASK_HPD |

				   EDP_PSR_DEBUG_MASK_LPSP);

		}

		hsw_psr_enable_source(intel_dp, crtc_state);



		/* Enable PSR on the panel */

		hsw_psr_enable_sink(intel_dp);
@@ -547,12 +557,6 @@ void intel_psr_enable(struct intel_dp *intel_dp, 
		/* Enable PSR on the panel */

		vlv_psr_enable_sink(intel_dp);



		/* On HSW+ enable_source also means go to PSR entry/active

		 * state as soon as idle_frame achieved and here would be

		 * to soon. However on VLV enable_source just enable PSR

		 * but let it on inactive state. So we might do this prior

		 * to active transition, i.e. here.

		 */

		vlv_psr_enable_source(intel_dp, crtc_state);

	}