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Commit 4c70b2ea authored by Alex Deucher's avatar Alex Deucher Committed by Dave Airlie
Browse files

drm/radeon/kms/igp: sideport is AMD only 



Intel variants don't support it.

Signed-off-by: default avatarAlex Deucher <alexdeucher@gmail.com>
Cc: stable@kernel.org
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent e06b14ee

drivers/gpu/drm/radeon/radeon_atombios.c

+6 −9
Original line number Diff line number Diff line
@@ -1032,21 +1032,18 @@ bool radeon_atombios_sideport_present(struct radeon_device *rdev) 
	u8 frev, crev;

	u16 data_offset;



	/* sideport is AMD only */

	if (rdev->family == CHIP_RS600)

		return false;



	if (atom_parse_data_header(mode_info->atom_context, index, NULL,

				   &frev, &crev, &data_offset)) {

		igp_info = (union igp_info *)(mode_info->atom_context->bios +

				      data_offset);

		switch (crev) {

		case 1:

			/* AMD IGPS */

			if ((rdev->family == CHIP_RS690) ||

			    (rdev->family == CHIP_RS740)) {

			if (igp_info->info.ulBootUpMemoryClock)

				return true;

			} else {

				if (igp_info->info.ucMemoryType & 0xf0)

					return true;

			}

			break;

		case 2:

			if (igp_info->info_2.ucMemoryType & 0x0f)

drivers/gpu/drm/radeon/radeon_combios.c

+4 −0
Original line number Diff line number Diff line
@@ -693,6 +693,10 @@ bool radeon_combios_sideport_present(struct radeon_device *rdev) 
	struct drm_device *dev = rdev->ddev;

	u16 igp_info;



	/* sideport is AMD only */

	if (rdev->family == CHIP_RS400)

		return false;



	igp_info = combios_get_table_offset(dev, COMBIOS_INTEGRATED_SYSTEM_INFO_TABLE);



	if (igp_info) {

drivers/gpu/drm/radeon/rs600.c

+0 −1
Original line number Diff line number Diff line
@@ -696,7 +696,6 @@ void rs600_mc_init(struct radeon_device *rdev) 
	rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);

	base = RREG32_MC(R_000004_MC_FB_LOCATION);

	base = G_000004_MC_FB_START(base) << 16;

	rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);

	radeon_vram_location(rdev, &rdev->mc, base);

	rdev->mc.gtt_base_align = 0;

	radeon_gtt_location(rdev, &rdev->mc);

drivers/gpu/drm/radeon/rs690.c

+1 −1
Original line number Diff line number Diff line
@@ -159,8 +159,8 @@ void rs690_mc_init(struct radeon_device *rdev) 
	rdev->mc.visible_vram_size = rdev->mc.aper_size;

	base = RREG32_MC(R_000100_MCCFG_FB_LOCATION);

	base = G_000100_MC_FB_START(base) << 16;

	rs690_pm_info(rdev);

	rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);

	rs690_pm_info(rdev);

	radeon_vram_location(rdev, &rdev->mc, base);

	rdev->mc.gtt_base_align = rdev->mc.gtt_size - 1;

	radeon_gtt_location(rdev, &rdev->mc);