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Commit 4bb62c95 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/radeon: work around a hw bug in MGCG on CIK 



Always need to set bit 0 of RLC_CGTT_MGCG_OVERRIDE
to avoid unreliable doorbell updates in some cases.

Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
parent 3feba08d

drivers/gpu/drm/radeon/cik.c

+2 −1
Original line number Original line Diff line number Diff line
@@ -6344,6 +6344,7 @@ static void cik_enable_mgcg(struct radeon_device *rdev, bool enable) 
		}

		}





		orig = data = RREG32(RLC_CGTT_MGCG_OVERRIDE);

		orig = data = RREG32(RLC_CGTT_MGCG_OVERRIDE);

		data |= 0x00000001;

		data &= 0xfffffffd;

		data &= 0xfffffffd;

		if (orig != data)

		if (orig != data)

			WREG32(RLC_CGTT_MGCG_OVERRIDE, data);

			WREG32(RLC_CGTT_MGCG_OVERRIDE, data);
@@ -6377,7 +6378,7 @@ static void cik_enable_mgcg(struct radeon_device *rdev, bool enable) 
		}

		}

	} else {

	} else {

		orig = data = RREG32(RLC_CGTT_MGCG_OVERRIDE);

		orig = data = RREG32(RLC_CGTT_MGCG_OVERRIDE);

		data |= 0x00000002;

		data |= 0x00000003;

		if (orig != data)

		if (orig != data)

			WREG32(RLC_CGTT_MGCG_OVERRIDE, data);

			WREG32(RLC_CGTT_MGCG_OVERRIDE, data);