Loading drivers/edac/amd64_edac.c +12 −12 Original line number Diff line number Diff line Loading @@ -1958,21 +1958,21 @@ static int get_channel_from_ecc_syndrome(struct mem_ctl_info *mci, u16 syndrome) u32 value = 0; int err_sym = 0; if (boot_cpu_data.x86 == 0x10) { amd64_read_pci_cfg(pvt->misc_f3_ctl, 0x180, &value); /* F3x180[EccSymbolSize]=1, x8 symbols */ if (boot_cpu_data.x86 == 0x10 && boot_cpu_data.x86_model > 7 && /* F3x180[EccSymbolSize]=1 => x8 symbols */ if (boot_cpu_data.x86_model > 7 && value & BIT(25)) { err_sym = decode_syndrome(syndrome, x8_vectors, ARRAY_SIZE(x8_vectors), 8); return map_err_sym_to_channel(err_sym, 8); } else { err_sym = decode_syndrome(syndrome, x4_vectors, ARRAY_SIZE(x4_vectors), 4); return map_err_sym_to_channel(err_sym, 4); } } err_sym = decode_syndrome(syndrome, x4_vectors, ARRAY_SIZE(x4_vectors), 4); return map_err_sym_to_channel(err_sym, 4); } /* * Check for valid error in the NB Status High register. If so, proceed to read Loading Loading
drivers/edac/amd64_edac.c +12 −12 Original line number Diff line number Diff line Loading @@ -1958,21 +1958,21 @@ static int get_channel_from_ecc_syndrome(struct mem_ctl_info *mci, u16 syndrome) u32 value = 0; int err_sym = 0; if (boot_cpu_data.x86 == 0x10) { amd64_read_pci_cfg(pvt->misc_f3_ctl, 0x180, &value); /* F3x180[EccSymbolSize]=1, x8 symbols */ if (boot_cpu_data.x86 == 0x10 && boot_cpu_data.x86_model > 7 && /* F3x180[EccSymbolSize]=1 => x8 symbols */ if (boot_cpu_data.x86_model > 7 && value & BIT(25)) { err_sym = decode_syndrome(syndrome, x8_vectors, ARRAY_SIZE(x8_vectors), 8); return map_err_sym_to_channel(err_sym, 8); } else { err_sym = decode_syndrome(syndrome, x4_vectors, ARRAY_SIZE(x4_vectors), 4); return map_err_sym_to_channel(err_sym, 4); } } err_sym = decode_syndrome(syndrome, x4_vectors, ARRAY_SIZE(x4_vectors), 4); return map_err_sym_to_channel(err_sym, 4); } /* * Check for valid error in the NB Status High register. If so, proceed to read Loading