Commit 4af2b145 authored Sep 03, 2007 by Ralf Baechle

[MIPS] Provide empty irq_enable_hazard definition for legacy and R1 cores.



Following a strict interpretation the empty definition of irq_enable_hazard
has always been a bug - but an intentional one because it didn't bite.
This has now changed, for uniprocessor kernels mm/slab.c:do_drain()

[...]
        on_each_cpu(do_drain, cachep, 1, 1);
        check_irq_on();
[...]

may be compiled into a mtc0 c0_status; mfc0 c0_status sequence resulting
in a back-to-back hazard.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

parent 76e7f799

include/asm-mips/hazards.h

+1 −0

Original line number	Diff line number	Diff line
		@@ -172,6 +172,7 @@ ASMMACRO(tlb_probe_hazard,
		nop; nop; nop
		)
		ASMMACRO(irq_enable_hazard,
		_ssnop; _ssnop; _ssnop;
		)
		ASMMACRO(irq_disable_hazard,
		nop; nop; nop