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Commit 4a8e2a31 authored by Konrad Rzeszutek Wilk's avatar Konrad Rzeszutek Wilk
Browse files

x86/apic: Replace io_apic_ops with x86_io_apic_ops. 



Which makes the code fit within the rest of the x86_ops functions.

Acked-by: default avatarSuresh Siddha <suresh.b.siddha@intel.com>
[v1: Changed x86_apic -> x86_ioapic per Yinghai Lu <yinghai@kernel.org> suggestion]
[v2: Rebased on tip/x86/urgent and redid to match Ingo's syntax style]
Signed-off-by: default avatarKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
parent 69964ea4

arch/x86/include/asm/io_apic.h

+23 −12
Original line number Diff line number Diff line
@@ -5,7 +5,7 @@ 
#include <asm/mpspec.h>

#include <asm/apicdef.h>

#include <asm/irq_vectors.h>



#include <asm/x86_init.h>

/*

 * Intel IO-APIC support for SMP and UP systems.

 *
@@ -21,15 +21,6 @@ 
#define IO_APIC_REDIR_LEVEL_TRIGGER	(1 << 15)

#define IO_APIC_REDIR_MASKED		(1 << 16)



struct io_apic_ops {

	void		(*init)  (void);

	unsigned int	(*read)  (unsigned int apic, unsigned int reg);

	void		(*write) (unsigned int apic, unsigned int reg, unsigned int value);

	void		(*modify)(unsigned int apic, unsigned int reg, unsigned int value);

};



void __init set_io_apic_ops(const struct io_apic_ops *);



/*

 * The structure of the IO-APIC:

 */
@@ -156,7 +147,6 @@ struct io_apic_irq_attr; 
extern int io_apic_set_pci_routing(struct device *dev, int irq,

		 struct io_apic_irq_attr *irq_attr);

void setup_IO_APIC_irq_extra(u32 gsi);

extern void ioapic_and_gsi_init(void);

extern void ioapic_insert_resources(void);



int io_apic_setup_irq_pin_once(unsigned int irq, int node, struct io_apic_irq_attr *attr);
@@ -185,12 +175,29 @@ extern void mp_save_irq(struct mpc_intsrc *m); 


extern void disable_ioapic_support(void);



extern void __init native_io_apic_init_mappings(void);

extern unsigned int native_io_apic_read(unsigned int apic, unsigned int reg);

extern void native_io_apic_write(unsigned int apic, unsigned int reg, unsigned int val);

extern void native_io_apic_modify(unsigned int apic, unsigned int reg, unsigned int val);



static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg)

{

	return x86_io_apic_ops.read(apic, reg);

}



static inline void io_apic_write(unsigned int apic, unsigned int reg, unsigned int value)

{

	x86_io_apic_ops.write(apic, reg, value);

}

static inline void io_apic_modify(unsigned int apic, unsigned int reg, unsigned int value)

{

	x86_io_apic_ops.modify(apic, reg, value);

}

#else  /* !CONFIG_X86_IO_APIC */



#define io_apic_assign_pci_irqs 0

#define setup_ioapic_ids_from_mpc x86_init_noop

static const int timer_through_8259 = 0;

static inline void ioapic_and_gsi_init(void) { }

static inline void ioapic_insert_resources(void) { }

#define gsi_top (NR_IRQS_LEGACY)

static inline int mp_find_ioapic(u32 gsi) { return 0; }
@@ -212,6 +219,10 @@ static inline int restore_ioapic_entries(void) 


static inline void mp_save_irq(struct mpc_intsrc *m) { };

static inline void disable_ioapic_support(void) { }

#define native_io_apic_init_mappings	NULL

#define native_io_apic_read		NULL

#define native_io_apic_write		NULL

#define native_io_apic_modify		NULL

#endif



#endif /* _ASM_X86_IO_APIC_H */

arch/x86/include/asm/x86_init.h

+8 −1
Original line number Diff line number Diff line
@@ -188,11 +188,18 @@ struct x86_msi_ops { 
	void (*restore_msi_irqs)(struct pci_dev *dev, int irq);

};



struct x86_io_apic_ops {

	void		(*init)  (void);

	unsigned int	(*read)  (unsigned int apic, unsigned int reg);

	void		(*write) (unsigned int apic, unsigned int reg, unsigned int value);

	void		(*modify)(unsigned int apic, unsigned int reg, unsigned int value);

};



extern struct x86_init_ops x86_init;

extern struct x86_cpuinit_ops x86_cpuinit;

extern struct x86_platform_ops x86_platform;

extern struct x86_msi_ops x86_msi;



extern struct x86_io_apic_ops x86_io_apic_ops;

extern void x86_init_noop(void);

extern void x86_init_uint_noop(unsigned int unused);

arch/x86/kernel/apic/io_apic.c

+4 −42
Original line number Diff line number Diff line
@@ -68,24 +68,6 @@ 
#define for_each_irq_pin(entry, head) \

	for (entry = head; entry; entry = entry->next)



static void		__init __ioapic_init_mappings(void);



static unsigned int	__io_apic_read  (unsigned int apic, unsigned int reg);

static void		__io_apic_write (unsigned int apic, unsigned int reg, unsigned int val);

static void		__io_apic_modify(unsigned int apic, unsigned int reg, unsigned int val);



static struct io_apic_ops io_apic_ops = {

	.init	= __ioapic_init_mappings,

	.read	= __io_apic_read,

	.write	= __io_apic_write,

	.modify = __io_apic_modify,

};



void __init set_io_apic_ops(const struct io_apic_ops *ops)

{

	io_apic_ops = *ops;

}



/*

 *      Is the SiS APIC rmw bug present ?

 *      -1 = don't know, 0 = no, 1 = yes
@@ -313,21 +295,6 @@ static void free_irq_at(unsigned int at, struct irq_cfg *cfg) 
	irq_free_desc(at);

}



static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg)

{

	return io_apic_ops.read(apic, reg);

}



static inline void io_apic_write(unsigned int apic, unsigned int reg, unsigned int value)

{

	io_apic_ops.write(apic, reg, value);

}



static inline void io_apic_modify(unsigned int apic, unsigned int reg, unsigned int value)

{

	io_apic_ops.modify(apic, reg, value);

}





struct io_apic {

	unsigned int index;
@@ -349,14 +316,14 @@ static inline void io_apic_eoi(unsigned int apic, unsigned int vector) 
	writel(vector, &io_apic->eoi);

}



static unsigned int __io_apic_read(unsigned int apic, unsigned int reg)

unsigned int native_io_apic_read(unsigned int apic, unsigned int reg)

{

	struct io_apic __iomem *io_apic = io_apic_base(apic);

	writel(reg, &io_apic->index);

	return readl(&io_apic->data);

}



static void __io_apic_write(unsigned int apic, unsigned int reg, unsigned int value)

void native_io_apic_write(unsigned int apic, unsigned int reg, unsigned int value)

{

	struct io_apic __iomem *io_apic = io_apic_base(apic);
@@ -370,7 +337,7 @@ static void __io_apic_write(unsigned int apic, unsigned int reg, unsigned int va 
 *

 * Older SiS APIC requires we rewrite the index register

 */

static void __io_apic_modify(unsigned int apic, unsigned int reg, unsigned int value)

void native_io_apic_modify(unsigned int apic, unsigned int reg, unsigned int value)

{

	struct io_apic __iomem *io_apic = io_apic_base(apic);
@@ -3931,12 +3898,7 @@ static struct resource * __init ioapic_setup_resources(int nr_ioapics) 
	return res;

}



void __init ioapic_and_gsi_init(void)

{

	io_apic_ops.init();

}



static void __init __ioapic_init_mappings(void)

void __init native_io_apic_init_mappings(void)

{

	unsigned long ioapic_phys, idx = FIX_IO_APIC_BASE_0;

	struct resource *ioapic_res;

arch/x86/kernel/setup.c

+1 −1
Original line number Diff line number Diff line
@@ -1012,7 +1012,7 @@ void __init setup_arch(char **cmdline_p) 
	init_cpu_to_node();



	init_apic_mappings();

	ioapic_and_gsi_init();

	x86_io_apic_ops.init();



	kvm_guest_init();

arch/x86/kernel/x86_init.c

+8 −0
Original line number Diff line number Diff line
@@ -18,6 +18,7 @@ 
#include <asm/e820.h>

#include <asm/time.h>

#include <asm/irq.h>

#include <asm/io_apic.h>

#include <asm/pat.h>

#include <asm/tsc.h>

#include <asm/iommu.h>
@@ -119,3 +120,10 @@ struct x86_msi_ops x86_msi = { 
	.teardown_msi_irqs = default_teardown_msi_irqs,

	.restore_msi_irqs = default_restore_msi_irqs,

};



struct x86_io_apic_ops x86_io_apic_ops = {

	.init	= native_io_apic_init_mappings,

	.read	= native_io_apic_read,

	.write	= native_io_apic_write,

	.modify	= native_io_apic_modify,

};