Loading arch/arm/mach-imx/mm-imx3.c +25 −27 Original line number Diff line number Diff line Loading @@ -34,7 +34,6 @@ static void imx3_idle(void) { unsigned long reg = 0; if (!need_resched()) __asm__ __volatile__( /* disable I and D cache */ "mrc p15, 0, %0, c1, c0, 0\n" Loading @@ -58,7 +57,6 @@ static void imx3_idle(void) "orr %0, %0, #0x00000004\n" "mcr p15, 0, %0, c1, c0, 0\n" : "=r" (reg)); local_irq_enable(); } static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size, Loading Loading @@ -134,8 +132,8 @@ void __init imx31_init_early(void) { mxc_set_cpu_type(MXC_CPU_MX31); mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); pm_idle = imx3_idle; imx_ioremap = imx3_ioremap; arm_pm_idle = imx3_idle; } void __init mx31_init_irq(void) Loading Loading @@ -197,7 +195,7 @@ void __init imx35_init_early(void) mxc_set_cpu_type(MXC_CPU_MX35); mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR)); mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR)); pm_idle = imx3_idle; arm_pm_idle = imx3_idle; imx_ioremap = imx3_ioremap; } Loading arch/arm/mach-imx/pm-imx27.c +1 −2 Original line number Diff line number Diff line Loading @@ -10,7 +10,6 @@ #include <linux/kernel.h> #include <linux/suspend.h> #include <linux/io.h> #include <mach/system.h> #include <mach/hardware.h> static int mx27_suspend_enter(suspend_state_t state) Loading @@ -23,7 +22,7 @@ static int mx27_suspend_enter(suspend_state_t state) cscr &= 0xFFFFFFFC; __raw_writel(cscr, MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR)); /* Executes WFI */ arch_idle(); cpu_do_idle(); break; default: Loading arch/arm/mach-mx5/mm.c +11 −17 Original line number Diff line number Diff line Loading @@ -26,24 +26,18 @@ static struct clk *gpc_dvfs_clk; static void imx5_idle(void) { if (!need_resched()) { /* gpc clock is needed for SRPG */ if (gpc_dvfs_clk == NULL) { gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs"); if (IS_ERR(gpc_dvfs_clk)) goto err0; return; } clk_enable(gpc_dvfs_clk); mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); if (tzic_enable_wake()) goto err1; if (tzic_enable_wake() != 0) cpu_do_idle(); err1: clk_disable(gpc_dvfs_clk); } err0: local_irq_enable(); } /* * Define the MX50 memory map. Loading Loading @@ -108,7 +102,7 @@ void __init imx51_init_early(void) mxc_set_cpu_type(MXC_CPU_MX51); mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR)); mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR)); pm_idle = imx5_idle; arm_pm_idle = imx5_idle; } void __init imx53_init_early(void) Loading Loading
arch/arm/mach-imx/mm-imx3.c +25 −27 Original line number Diff line number Diff line Loading @@ -34,7 +34,6 @@ static void imx3_idle(void) { unsigned long reg = 0; if (!need_resched()) __asm__ __volatile__( /* disable I and D cache */ "mrc p15, 0, %0, c1, c0, 0\n" Loading @@ -58,7 +57,6 @@ static void imx3_idle(void) "orr %0, %0, #0x00000004\n" "mcr p15, 0, %0, c1, c0, 0\n" : "=r" (reg)); local_irq_enable(); } static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size, Loading Loading @@ -134,8 +132,8 @@ void __init imx31_init_early(void) { mxc_set_cpu_type(MXC_CPU_MX31); mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); pm_idle = imx3_idle; imx_ioremap = imx3_ioremap; arm_pm_idle = imx3_idle; } void __init mx31_init_irq(void) Loading Loading @@ -197,7 +195,7 @@ void __init imx35_init_early(void) mxc_set_cpu_type(MXC_CPU_MX35); mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR)); mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR)); pm_idle = imx3_idle; arm_pm_idle = imx3_idle; imx_ioremap = imx3_ioremap; } Loading
arch/arm/mach-imx/pm-imx27.c +1 −2 Original line number Diff line number Diff line Loading @@ -10,7 +10,6 @@ #include <linux/kernel.h> #include <linux/suspend.h> #include <linux/io.h> #include <mach/system.h> #include <mach/hardware.h> static int mx27_suspend_enter(suspend_state_t state) Loading @@ -23,7 +22,7 @@ static int mx27_suspend_enter(suspend_state_t state) cscr &= 0xFFFFFFFC; __raw_writel(cscr, MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR)); /* Executes WFI */ arch_idle(); cpu_do_idle(); break; default: Loading
arch/arm/mach-mx5/mm.c +11 −17 Original line number Diff line number Diff line Loading @@ -26,24 +26,18 @@ static struct clk *gpc_dvfs_clk; static void imx5_idle(void) { if (!need_resched()) { /* gpc clock is needed for SRPG */ if (gpc_dvfs_clk == NULL) { gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs"); if (IS_ERR(gpc_dvfs_clk)) goto err0; return; } clk_enable(gpc_dvfs_clk); mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); if (tzic_enable_wake()) goto err1; if (tzic_enable_wake() != 0) cpu_do_idle(); err1: clk_disable(gpc_dvfs_clk); } err0: local_irq_enable(); } /* * Define the MX50 memory map. Loading Loading @@ -108,7 +102,7 @@ void __init imx51_init_early(void) mxc_set_cpu_type(MXC_CPU_MX51); mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR)); mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR)); pm_idle = imx5_idle; arm_pm_idle = imx5_idle; } void __init imx53_init_early(void) Loading