Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 4a136d59 authored by Tina Zhang's avatar Tina Zhang Committed by Zhenyu Wang
Browse files

drm/i915/gvt: Introduce KBL to dma-buf on Gvt-g 



This patch introduces KBL platform to dma-buf on Gvt-g.

Signed-off-by: default avatarTina Zhang <tina.zhang@intel.com>
Signed-off-by: default avatarZhenyu Wang <zhenyuw@linux.intel.com>
parent dfb6ae4e

drivers/gpu/drm/i915/gvt/dmabuf.c

+1 −1
Original line number Diff line number Diff line
@@ -164,7 +164,7 @@ static struct drm_i915_gem_object *vgpu_create_gem(struct drm_device *dev, 


	obj->base.read_domains = I915_GEM_DOMAIN_GTT;

	obj->base.write_domain = 0;

	if (IS_SKYLAKE(dev_priv)) {

	if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) {

		unsigned int tiling_mode = 0;

		unsigned int stride = 0;

drivers/gpu/drm/i915/gvt/fb_decoder.c

+5 −4
Original line number Diff line number Diff line
@@ -150,7 +150,7 @@ static u32 intel_vgpu_get_stride(struct intel_vgpu *vgpu, int pipe, 
	u32 stride_reg = vgpu_vreg(vgpu, DSPSTRIDE(pipe)) & stride_mask;

	u32 stride = stride_reg;



	if (IS_SKYLAKE(dev_priv)) {

	if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) {

		switch (tiled) {

		case PLANE_CTL_TILED_LINEAR:

			stride = stride_reg * 64;
@@ -214,7 +214,7 @@ int intel_vgpu_decode_primary_plane(struct intel_vgpu *vgpu, 
	if (!plane->enabled)

		return -ENODEV;



	if (IS_SKYLAKE(dev_priv)) {

	if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) {

		plane->tiled = (val & PLANE_CTL_TILED_MASK) >>

		_PLANE_CTL_TILED_SHIFT;

		fmt = skl_format_to_drm(
@@ -253,7 +253,8 @@ int intel_vgpu_decode_primary_plane(struct intel_vgpu *vgpu, 
	}



	plane->stride = intel_vgpu_get_stride(vgpu, pipe, (plane->tiled << 10),

		(IS_SKYLAKE(dev_priv)) ? (_PRI_PLANE_STRIDE_MASK >> 6) :

		(IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) ?

			(_PRI_PLANE_STRIDE_MASK >> 6) :

				_PRI_PLANE_STRIDE_MASK, plane->bpp);



	plane->width = (vgpu_vreg(vgpu, PIPESRC(pipe)) & _PIPE_H_SRCSZ_MASK) >>