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Commit 48f76b68 authored by Sasha Neftin's avatar Sasha Neftin Committed by Jeff Kirsher
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e1000e: Initial Support for IceLake



i219 (8) and i219 (9) are the next LOM generations that will be available
on the next Intel Client platform (IceLake).
This patch provides the initial support for these devices

Signed-off-by: default avatarSasha Neftin <sasha.neftin@intel.com>
Reviewed-by: default avatarRaanan Avargil <raanan.avargil@intel.com>
Reviewed-by: default avatarDima Ruinskiy <dima.ruinskiy@intel.com>
Tested-by: default avatarAaron Brown <aaron.f.brown@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent 46b3bb9b
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+4 −0
Original line number Diff line number Diff line
@@ -100,6 +100,10 @@ struct e1000_hw;
#define E1000_DEV_ID_PCH_CNP_I219_V6		0x15BE
#define E1000_DEV_ID_PCH_CNP_I219_LM7		0x15BB
#define E1000_DEV_ID_PCH_CNP_I219_V7		0x15BC
#define E1000_DEV_ID_PCH_ICP_I219_LM8		0x15DF
#define E1000_DEV_ID_PCH_ICP_I219_V8		0x15E0
#define E1000_DEV_ID_PCH_ICP_I219_LM9		0x15E1
#define E1000_DEV_ID_PCH_ICP_I219_V9		0x15E2

#define E1000_REVISION_4	4

+4 −0
Original line number Diff line number Diff line
@@ -7544,6 +7544,10 @@ static const struct pci_device_id e1000_pci_tbl[] = {
	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_V6), board_pch_cnp },
	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_LM7), board_pch_cnp },
	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_V7), board_pch_cnp },
	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_LM8), board_pch_cnp },
	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_V8), board_pch_cnp },
	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_LM9), board_pch_cnp },
	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_V9), board_pch_cnp },

	{ 0, 0, 0, 0, 0, 0, 0 }	/* terminate list */
};