Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 48b3fd14 authored by Grant Likely's avatar Grant Likely
Browse files

powerpc/4xx: update ml507 .dts file to release reference design 



This patch updates the Xilinx ML507 device tree to match the released
ML507 powerpc reference design (ml507_ppc440_emb_ref).  This patch is
needed to boot Linux on the ML507 powerpc reference design without
manually generating and tweaking a device tree from the project directory.

Signed-off-by: default avatarGrant Likely <grant.likely@secretlab.ca>
parent aafbf16b

arch/powerpc/boot/dts/virtex440-ml507.dts

+113 −11
Original line number Diff line number Diff line
@@ -7,6 +7,15 @@ 
 * This file is licensed under the terms of the GNU General Public License

 * version 2. This program is licensed "as is" without any warranty of any

 * kind, whether express or implied.

 *

 * ---

 *

 * Device Tree Generator version: 1.1

 *

 * CAUTION: This file is automatically generated by libgen.

 * Version: Xilinx EDK 10.1.03 EDK_K_SP3.6

 *

 * XPS project directory: ml507_ppc440_emb_ref

 */



/dts-v1/;
@@ -22,8 +31,8 @@ 
		reg = < 0 0x10000000 >;

	} ;

	chosen {

		bootargs = "console=ttyS0 ip=on root=/dev/ram";

		linux,stdout-path = "/plb@0/serial@83e00000";

		bootargs = "console=ttyS0 root=/dev/ram";

		linux,stdout-path = &RS232_Uart_1;

	} ;

	cpus {

		#address-cells = <1>;
@@ -136,19 +145,19 @@ 
				compatible = "xlnx,ll-dma-1.00.a";

				dcr-reg = < 0x80 0x11 >;

				interrupt-parent = <&xps_intc_0>;

				interrupts = < 9 2 0xa 2 >;

				interrupts = < 10 2 11 2 >;

			} ;

		} ;

	} ;

	plb_v46_0: plb@0 {

		#address-cells = <1>;

		#size-cells = <1>;

		compatible = "xlnx,plb-v46-1.02.a", "simple-bus";

		compatible = "xlnx,plb-v46-1.03.a", "simple-bus";

		ranges ;

		DIP_Switches_8Bit: gpio@81460000 {

			compatible = "xlnx,xps-gpio-1.00.a";

			interrupt-parent = <&xps_intc_0>;

			interrupts = < 6 2 >;

			interrupts = < 7 2 >;

			reg = < 0x81460000 0x10000 >;

			xlnx,all-inputs = <1>;

			xlnx,all-inputs-2 = <0>;
@@ -163,6 +172,86 @@ 
			xlnx,tri-default = <0xffffffff>;

			xlnx,tri-default-2 = <0xffffffff>;

		} ;

		FLASH: flash@fc000000 {

			bank-width = <2>;

			compatible = "xlnx,xps-mch-emc-2.00.a", "cfi-flash";

			reg = < 0xfc000000 0x2000000 >;

			xlnx,family = "virtex5";

			xlnx,include-datawidth-matching-0 = <0x1>;

			xlnx,include-datawidth-matching-1 = <0x0>;

			xlnx,include-datawidth-matching-2 = <0x0>;

			xlnx,include-datawidth-matching-3 = <0x0>;

			xlnx,include-negedge-ioregs = <0x0>;

			xlnx,include-plb-ipif = <0x1>;

			xlnx,include-wrbuf = <0x1>;

			xlnx,max-mem-width = <0x10>;

			xlnx,mch-native-dwidth = <0x20>;

			xlnx,mch-plb-clk-period-ps = <0x2710>;

			xlnx,mch-splb-awidth = <0x20>;

			xlnx,mch0-accessbuf-depth = <0x10>;

			xlnx,mch0-protocol = <0x0>;

			xlnx,mch0-rddatabuf-depth = <0x10>;

			xlnx,mch1-accessbuf-depth = <0x10>;

			xlnx,mch1-protocol = <0x0>;

			xlnx,mch1-rddatabuf-depth = <0x10>;

			xlnx,mch2-accessbuf-depth = <0x10>;

			xlnx,mch2-protocol = <0x0>;

			xlnx,mch2-rddatabuf-depth = <0x10>;

			xlnx,mch3-accessbuf-depth = <0x10>;

			xlnx,mch3-protocol = <0x0>;

			xlnx,mch3-rddatabuf-depth = <0x10>;

			xlnx,mem0-width = <0x10>;

			xlnx,mem1-width = <0x20>;

			xlnx,mem2-width = <0x20>;

			xlnx,mem3-width = <0x20>;

			xlnx,num-banks-mem = <0x1>;

			xlnx,num-channels = <0x2>;

			xlnx,priority-mode = <0x0>;

			xlnx,synch-mem-0 = <0x0>;

			xlnx,synch-mem-1 = <0x0>;

			xlnx,synch-mem-2 = <0x0>;

			xlnx,synch-mem-3 = <0x0>;

			xlnx,synch-pipedelay-0 = <0x2>;

			xlnx,synch-pipedelay-1 = <0x2>;

			xlnx,synch-pipedelay-2 = <0x2>;

			xlnx,synch-pipedelay-3 = <0x2>;

			xlnx,tavdv-ps-mem-0 = <0x1adb0>;

			xlnx,tavdv-ps-mem-1 = <0x3a98>;

			xlnx,tavdv-ps-mem-2 = <0x3a98>;

			xlnx,tavdv-ps-mem-3 = <0x3a98>;

			xlnx,tcedv-ps-mem-0 = <0x1adb0>;

			xlnx,tcedv-ps-mem-1 = <0x3a98>;

			xlnx,tcedv-ps-mem-2 = <0x3a98>;

			xlnx,tcedv-ps-mem-3 = <0x3a98>;

			xlnx,thzce-ps-mem-0 = <0x88b8>;

			xlnx,thzce-ps-mem-1 = <0x1b58>;

			xlnx,thzce-ps-mem-2 = <0x1b58>;

			xlnx,thzce-ps-mem-3 = <0x1b58>;

			xlnx,thzoe-ps-mem-0 = <0x1b58>;

			xlnx,thzoe-ps-mem-1 = <0x1b58>;

			xlnx,thzoe-ps-mem-2 = <0x1b58>;

			xlnx,thzoe-ps-mem-3 = <0x1b58>;

			xlnx,tlzwe-ps-mem-0 = <0x88b8>;

			xlnx,tlzwe-ps-mem-1 = <0x0>;

			xlnx,tlzwe-ps-mem-2 = <0x0>;

			xlnx,tlzwe-ps-mem-3 = <0x0>;

			xlnx,twc-ps-mem-0 = <0x2af8>;

			xlnx,twc-ps-mem-1 = <0x3a98>;

			xlnx,twc-ps-mem-2 = <0x3a98>;

			xlnx,twc-ps-mem-3 = <0x3a98>;

			xlnx,twp-ps-mem-0 = <0x11170>;

			xlnx,twp-ps-mem-1 = <0x2ee0>;

			xlnx,twp-ps-mem-2 = <0x2ee0>;

			xlnx,twp-ps-mem-3 = <0x2ee0>;

			xlnx,xcl0-linesize = <0x4>;

			xlnx,xcl0-writexfer = <0x1>;

			xlnx,xcl1-linesize = <0x4>;

			xlnx,xcl1-writexfer = <0x1>;

			xlnx,xcl2-linesize = <0x4>;

			xlnx,xcl2-writexfer = <0x1>;

			xlnx,xcl3-linesize = <0x4>;

			xlnx,xcl3-writexfer = <0x1>;

		} ;

		Hard_Ethernet_MAC: xps-ll-temac@81c00000 {

			#address-cells = <1>;

			#size-cells = <1>;
@@ -185,6 +274,19 @@ 
				xlnx,txfifo = <0x1000>;

			} ;

		} ;

		IIC_EEPROM: i2c@81600000 {

			compatible = "xlnx,xps-iic-2.00.a";

			interrupt-parent = <&xps_intc_0>;

			interrupts = < 6 2 >;

			reg = < 0x81600000 0x10000 >;

			xlnx,clk-freq = <0x5f5e100>;

			xlnx,family = "virtex5";

			xlnx,gpo-width = <0x1>;

			xlnx,iic-freq = <0x186a0>;

			xlnx,scl-inertial-delay = <0x0>;

			xlnx,sda-inertial-delay = <0x0>;

			xlnx,ten-bit-adr = <0x0>;

		} ;

		LEDs_8Bit: gpio@81400000 {

			compatible = "xlnx,xps-gpio-1.00.a";

			reg = < 0x81400000 0x10000 >;
@@ -220,7 +322,7 @@ 
		Push_Buttons_5Bit: gpio@81440000 {

			compatible = "xlnx,xps-gpio-1.00.a";

			interrupt-parent = <&xps_intc_0>;

			interrupts = < 7 2 >;

			interrupts = < 8 2 >;

			reg = < 0x81440000 0x10000 >;

			xlnx,all-inputs = <1>;

			xlnx,all-inputs-2 = <0>;
@@ -237,13 +339,13 @@ 
		} ;

		RS232_Uart_1: serial@83e00000 {

			clock-frequency = <100000000>;

			compatible = "xlnx,xps-uart16550-2.00.a", "ns16550";

			current-speed = <0x2580>;

			compatible = "xlnx,xps-uart16550-2.00.b", "ns16550";

			current-speed = <9600>;

			device_type = "serial";

			interrupt-parent = <&xps_intc_0>;

			interrupts = < 8 2 >;

			interrupts = < 9 2 >;

			reg = < 0x83e00000 0x10000 >;

			reg-offset = <3>;

			reg-offset = <0x1003>;

			reg-shift = <2>;

			xlnx,family = "virtex5";

			xlnx,has-external-rclk = <0>;
@@ -268,7 +370,7 @@ 
			compatible = "xlnx,xps-intc-1.00.a";

			interrupt-controller ;

			reg = < 0x81800000 0x10000 >;

			xlnx,num-intr-inputs = <0xb>;

			xlnx,num-intr-inputs = <0xc>;

		} ;

		xps_timebase_wdt_1: xps-timebase-wdt@83a00000 {

			compatible = "xlnx,xps-timebase-wdt-1.00.b";