Loading msm/dsi/dsi_display.c +4 −2 Original line number Diff line number Diff line Loading @@ -6380,10 +6380,12 @@ int dsi_display_prepare(struct dsi_display *display) dsi_display_ctrl_isr_configure(display, true); if (mode->dsi_mode_flags & DSI_MODE_FLAG_DMS) { if (display->is_cont_splash_enabled) { pr_err("DMS is not supposed to be set on first frame\n"); if (display->is_cont_splash_enabled && display->config.panel_mode == DSI_OP_VIDEO_MODE) { pr_err("DMS not supported on first frame\n"); return -EINVAL; } /* update dsi ctrl for new mode */ rc = dsi_display_pre_switch(display); if (rc) Loading msm/sde/sde_encoder.c +7 −5 Original line number Diff line number Diff line Loading @@ -4643,7 +4643,7 @@ int sde_encoder_prepare_for_kickoff(struct drm_encoder *drm_enc, struct sde_kms *sde_kms = NULL; struct sde_crtc *sde_crtc; struct msm_drm_private *priv = NULL; bool needs_hw_reset = false; bool needs_hw_reset = false, is_cmd_mode; int ln_cnt1 = -EINVAL, i, rc, ret = 0; struct msm_display_info *disp_info; Loading Loading @@ -4671,9 +4671,10 @@ int sde_encoder_prepare_for_kickoff(struct drm_encoder *drm_enc, sde_connector_set_qsync_params( sde_enc->cur_master->connector); if (sde_enc->cur_master && sde_enc->cur_master->connector && sde_encoder_check_curr_mode(drm_enc, MSM_DISPLAY_CMD_MODE)) is_cmd_mode = sde_encoder_check_curr_mode(drm_enc, MSM_DISPLAY_CMD_MODE); if (sde_enc->cur_master && sde_enc->cur_master->connector && is_cmd_mode) sde_enc->frame_trigger_mode = sde_connector_get_property( sde_enc->cur_master->connector->state, CONNECTOR_PROP_CMD_FRAME_TRIGGER_MODE); Loading Loading @@ -4732,7 +4733,8 @@ int sde_encoder_prepare_for_kickoff(struct drm_encoder *drm_enc, } if (_sde_encoder_is_dsc_enabled(drm_enc) && sde_enc->cur_master && !sde_enc->cur_master->cont_splash_enabled) { ((is_cmd_mode && sde_enc->cur_master->cont_splash_enabled) || !sde_enc->cur_master->cont_splash_enabled)) { rc = _sde_encoder_dsc_setup(sde_enc, params); if (rc) { SDE_ERROR_ENC(sde_enc, "failed to setup DSC: %d\n", rc); Loading Loading
msm/dsi/dsi_display.c +4 −2 Original line number Diff line number Diff line Loading @@ -6380,10 +6380,12 @@ int dsi_display_prepare(struct dsi_display *display) dsi_display_ctrl_isr_configure(display, true); if (mode->dsi_mode_flags & DSI_MODE_FLAG_DMS) { if (display->is_cont_splash_enabled) { pr_err("DMS is not supposed to be set on first frame\n"); if (display->is_cont_splash_enabled && display->config.panel_mode == DSI_OP_VIDEO_MODE) { pr_err("DMS not supported on first frame\n"); return -EINVAL; } /* update dsi ctrl for new mode */ rc = dsi_display_pre_switch(display); if (rc) Loading
msm/sde/sde_encoder.c +7 −5 Original line number Diff line number Diff line Loading @@ -4643,7 +4643,7 @@ int sde_encoder_prepare_for_kickoff(struct drm_encoder *drm_enc, struct sde_kms *sde_kms = NULL; struct sde_crtc *sde_crtc; struct msm_drm_private *priv = NULL; bool needs_hw_reset = false; bool needs_hw_reset = false, is_cmd_mode; int ln_cnt1 = -EINVAL, i, rc, ret = 0; struct msm_display_info *disp_info; Loading Loading @@ -4671,9 +4671,10 @@ int sde_encoder_prepare_for_kickoff(struct drm_encoder *drm_enc, sde_connector_set_qsync_params( sde_enc->cur_master->connector); if (sde_enc->cur_master && sde_enc->cur_master->connector && sde_encoder_check_curr_mode(drm_enc, MSM_DISPLAY_CMD_MODE)) is_cmd_mode = sde_encoder_check_curr_mode(drm_enc, MSM_DISPLAY_CMD_MODE); if (sde_enc->cur_master && sde_enc->cur_master->connector && is_cmd_mode) sde_enc->frame_trigger_mode = sde_connector_get_property( sde_enc->cur_master->connector->state, CONNECTOR_PROP_CMD_FRAME_TRIGGER_MODE); Loading Loading @@ -4732,7 +4733,8 @@ int sde_encoder_prepare_for_kickoff(struct drm_encoder *drm_enc, } if (_sde_encoder_is_dsc_enabled(drm_enc) && sde_enc->cur_master && !sde_enc->cur_master->cont_splash_enabled) { ((is_cmd_mode && sde_enc->cur_master->cont_splash_enabled) || !sde_enc->cur_master->cont_splash_enabled)) { rc = _sde_encoder_dsc_setup(sde_enc, params); if (rc) { SDE_ERROR_ENC(sde_enc, "failed to setup DSC: %d\n", rc); Loading