Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 48a59ef3 authored by Viresh Kumar's avatar Viresh Kumar Committed by Vinod Koul
Browse files

dmaengine/amba-pl08x: Simplify pl08x_ensure_on() 



Simply writing 1 on bit 0 is sufficient instead of reading and clearing bits.
Also as per manual, for bit 3-31 of DMACConfiguration register:
"read undefined, write as 0"

So, we must not rely on values read from this registers bit 3-31.

Signed-off-by: default avatarViresh Kumar <viresh.kumar@st.com>
Acked-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
parent b7b6018b

drivers/dma/amba-pl08x.c

+1 −7
Original line number Diff line number Diff line
@@ -1502,13 +1502,7 @@ bool pl08x_filter_id(struct dma_chan *chan, void *chan_id) 
 */

static void pl08x_ensure_on(struct pl08x_driver_data *pl08x)

{

	u32 val;



	val = readl(pl08x->base + PL080_CONFIG);

	val &= ~(PL080_CONFIG_M2_BE | PL080_CONFIG_M1_BE | PL080_CONFIG_ENABLE);

	/* We implicitly clear bit 1 and that means little-endian mode */

	val |= PL080_CONFIG_ENABLE;

	writel(val, pl08x->base + PL080_CONFIG);

	writel(PL080_CONFIG_ENABLE, pl08x->base + PL080_CONFIG);

}



static void pl08x_unmap_buffers(struct pl08x_txd *txd)