Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 48671bab authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
Browse files

Merge "asoc: wcd938x: Enable watchdog interrupt"

parents 45b4733d 17bea6ec
Loading
Loading
Loading
Loading
+1 −0
Original line number Diff line number Diff line
@@ -95,6 +95,7 @@ struct wcd938x_priv {
	struct snd_info_entry *entry;
	struct snd_info_entry *version_entry;
	int flyback_cur_det_disable;
	int ear_rx_path;
};

struct wcd938x_micbias_setting {
+55 −0
Original line number Diff line number Diff line
@@ -29,6 +29,7 @@

#define WCD938X_VERSION_1_0 1
#define WCD938X_VERSION_ENTRY_SIZE 32
#define EAR_RX_PATH_AUX 1

#define ADC_MODE_VAL_HIFI     0x01
#define ADC_MODE_VAL_LO_HIF   0x02
@@ -629,6 +630,8 @@ static int wcd938x_codec_enable_hphr_pa(struct snd_soc_dapm_widget *w,
		/* 100 usec delay as per HW requirement */
		usleep_range(100, 110);
		set_bit(HPH_PA_DELAY, &wcd938x->status_mask);
		snd_soc_component_update_bits(component,
				WCD938X_DIGITAL_PDM_WD_CTL1, 0x17, 0x13);
		break;
	case SND_SOC_DAPM_POST_PMU:
		/*
@@ -666,6 +669,8 @@ static int wcd938x_codec_enable_hphr_pa(struct snd_soc_dapm_widget *w,
	case SND_SOC_DAPM_POST_PMD:
		/* 7 msec delay as per HW requirement */
		usleep_range(7000, 7010);
		snd_soc_component_update_bits(component,
				WCD938X_DIGITAL_PDM_WD_CTL1, 0x17, 0x00);
		blocking_notifier_call_chain(&wcd938x->mbhc->notifier,
					     WCD_EVENT_POST_HPHR_PA_OFF,
					     &wcd938x->mbhc->wcd_mbhc);
@@ -706,6 +711,8 @@ static int wcd938x_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w,
		/* 100 usec delay as per HW requirement */
		usleep_range(100, 110);
		set_bit(HPH_PA_DELAY, &wcd938x->status_mask);
		snd_soc_component_update_bits(component,
				WCD938X_DIGITAL_PDM_WD_CTL0, 0x17, 0x13);
		break;
	case SND_SOC_DAPM_POST_PMU:
		/*
@@ -743,6 +750,8 @@ static int wcd938x_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w,
	case SND_SOC_DAPM_POST_PMD:
		/* 7 msec delay as per HW requirement */
		usleep_range(7000, 7010);
		snd_soc_component_update_bits(component,
				WCD938X_DIGITAL_PDM_WD_CTL0, 0x17, 0x00);
		blocking_notifier_call_chain(&wcd938x->mbhc->notifier,
					     WCD_EVENT_POST_HPHL_PA_OFF,
					     &wcd938x->mbhc->wcd_mbhc);
@@ -775,6 +784,8 @@ static int wcd938x_codec_enable_aux_pa(struct snd_soc_dapm_widget *w,
		ret = swr_slvdev_datapath_control(wcd938x->rx_swr_dev,
			    wcd938x->rx_swr_dev->dev_num,
			    true);
		snd_soc_component_update_bits(component,
				WCD938X_DIGITAL_PDM_WD_CTL2, 0x05, 0x05);
		break;
	case SND_SOC_DAPM_POST_PMU:
		/* 1 msec delay as per HW requirement */
@@ -798,6 +809,8 @@ static int wcd938x_codec_enable_aux_pa(struct snd_soc_dapm_widget *w,
	case SND_SOC_DAPM_POST_PMD:
		/* 1 msec delay as per HW requirement */
		usleep_range(1000, 1010);
		snd_soc_component_update_bits(component,
				WCD938X_DIGITAL_PDM_WD_CTL2, 0x05, 0x00);
		wcd_cls_h_fsm(component, &wcd938x->clsh_info,
			     WCD_CLSH_EVENT_POST_PA,
			     WCD_CLSH_STATE_AUX,
@@ -831,6 +844,21 @@ static int wcd938x_codec_enable_ear_pa(struct snd_soc_dapm_widget *w,
		ret = swr_slvdev_datapath_control(wcd938x->rx_swr_dev,
			    wcd938x->rx_swr_dev->dev_num,
			    true);
		/*
		 * Enable watchdog interrupt for HPHL or AUX
		 * depending on mux value
		 */
		wcd938x->ear_rx_path =
			snd_soc_component_read32(
				component, WCD938X_DIGITAL_CDC_EAR_PATH_CTL);
		if (wcd938x->ear_rx_path & EAR_RX_PATH_AUX)
			snd_soc_component_update_bits(component,
					WCD938X_DIGITAL_PDM_WD_CTL2,
					0x05, 0x05);
		else
			snd_soc_component_update_bits(component,
					WCD938X_DIGITAL_PDM_WD_CTL0,
					0x17, 0x13);
		break;
	case SND_SOC_DAPM_POST_PMU:
		/* 6 msec delay as per HW requirement */
@@ -854,6 +882,14 @@ static int wcd938x_codec_enable_ear_pa(struct snd_soc_dapm_widget *w,
	case SND_SOC_DAPM_POST_PMD:
		/* 7 msec delay as per HW requirement */
		usleep_range(7000, 7010);
		if (wcd938x->ear_rx_path & EAR_RX_PATH_AUX)
			snd_soc_component_update_bits(component,
					WCD938X_DIGITAL_PDM_WD_CTL2,
					0x05, 0x00);
		else
			snd_soc_component_update_bits(component,
					WCD938X_DIGITAL_PDM_WD_CTL0,
					0x17, 0x00);
		wcd_cls_h_fsm(component, &wcd938x->clsh_info,
			     WCD_CLSH_EVENT_POST_PA,
			     WCD_CLSH_STATE_EAR,
@@ -2717,6 +2753,13 @@ struct wcd938x_pdata *wcd938x_populate_dt_data(struct device *dev)
	return pdata;
}

static irqreturn_t wcd938x_wd_handle_irq(int irq, void *data)
{
	pr_err_ratelimited("%s: Watchdog interrupt for irq =%d triggered\n",
			   __func__, irq);
	return IRQ_HANDLED;
}

static int wcd938x_bind(struct device *dev)
{
	int ret = 0, i = 0;
@@ -2780,6 +2823,18 @@ static int wcd938x_bind(struct device *dev)
	}
	wcd938x->tx_swr_dev->slave_irq = wcd938x->virq;

	/* Request for watchdog interrupt */
	wcd_request_irq(&wcd938x->irq_info, WCD938X_IRQ_HPHR_PDM_WD_INT,
			"HPHR PDM WD INT", wcd938x_wd_handle_irq, NULL);
	wcd_request_irq(&wcd938x->irq_info, WCD938X_IRQ_HPHL_PDM_WD_INT,
			"HPHL PDM WD INT", wcd938x_wd_handle_irq, NULL);
	wcd_request_irq(&wcd938x->irq_info, WCD938X_IRQ_AUX_PDM_WD_INT,
			"AUX PDM WD INT", wcd938x_wd_handle_irq, NULL);
	/* Enable watchdog interrupt for HPH and AUX */
	wcd_enable_irq(&wcd938x->irq_info, WCD938X_IRQ_HPHR_PDM_WD_INT);
	wcd_enable_irq(&wcd938x->irq_info, WCD938X_IRQ_HPHL_PDM_WD_INT);
	wcd_enable_irq(&wcd938x->irq_info, WCD938X_IRQ_AUX_PDM_WD_INT);

	ret = snd_soc_register_component(dev, &soc_codec_dev_wcd938x,
				     NULL, 0);
	if (ret) {