Loading arch/arm64/boot/dts/qcom/kona-cdp.dtsi +23 −0 Original line number Diff line number Diff line Loading @@ -30,6 +30,29 @@ &tert_mi2s_sd0_sleep>; }; &qupv3_se1_i2c { status = "ok"; qcom,clk-freq-out = <1000000>; #address-cells = <1>; #size-cells = <0>; nq@28 { compatible = "qcom,nq-nci"; reg = <0x28>; qcom,nq-irq = <&tlmm 111 0x00>; qcom,nq-ven = <&tlmm 6 0x00>; qcom,nq-firm = <&tlmm 110 0x00>; qcom,nq-clkreq = <&tlmm 7 0x00>; interrupt-parent = <&tlmm>; interrupts = <111 0>; interrupt-names = "nfc_irq"; pinctrl-names = "nfc_active", "nfc_suspend"; pinctrl-0 = <&nfc_int_active &nfc_enable_active &nfc_clk_req_active>; pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend &nfc_clk_req_suspend>; }; }; &ufsphy_mem { compatible = "qcom,ufs-phy-qmp-v4"; Loading arch/arm64/boot/dts/qcom/kona-mtp.dtsi +23 −0 Original line number Diff line number Diff line Loading @@ -30,6 +30,29 @@ &tert_mi2s_sd0_sleep>; }; &qupv3_se1_i2c { status = "ok"; qcom,clk-freq-out = <1000000>; #address-cells = <1>; #size-cells = <0>; nq@28 { compatible = "qcom,nq-nci"; reg = <0x28>; qcom,nq-irq = <&tlmm 111 0x00>; qcom,nq-ven = <&tlmm 6 0x00>; qcom,nq-firm = <&tlmm 110 0x00>; qcom,nq-clkreq = <&tlmm 7 0x00>; interrupt-parent = <&tlmm>; interrupts = <111 0>; interrupt-names = "nfc_irq"; pinctrl-names = "nfc_active", "nfc_suspend"; pinctrl-0 = <&nfc_int_active &nfc_enable_active &nfc_clk_req_active>; pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend &nfc_clk_req_suspend>; }; }; &ufsphy_mem { compatible = "qcom,ufs-phy-qmp-v4"; Loading arch/arm64/boot/dts/qcom/kona-pinctrl.dtsi +92 −0 Original line number Diff line number Diff line Loading @@ -2551,6 +2551,98 @@ }; }; nfc { nfc_int_active: nfc_int_active { /* active state */ mux { /* GPIO 111 NFC Read Interrupt */ pins = "gpio111"; function = "gpio"; }; config { pins = "gpio111"; drive-strength = <2>; /* 2 MA */ bias-pull-up; }; }; nfc_int_suspend: nfc_int_suspend { /* sleep state */ mux { /* GPIO 111 NFC Read Interrupt */ pins = "gpio111"; function = "gpio"; }; config { pins = "gpio111"; drive-strength = <2>; /* 2 MA */ bias-pull-up; }; }; nfc_enable_active: nfc_enable_active { /* active state */ mux { /* 6: Enable 110: Firmware */ pins = "gpio6", "gpio110"; function = "gpio"; }; config { pins = "gpio6", "gpio110"; drive-strength = <2>; /* 2 MA */ bias-pull-up; }; }; nfc_enable_suspend: nfc_enable_suspend { /* sleep state */ mux { /* 6: Enable 110: Firmware */ pins = "gpio6", "gpio110"; function = "gpio"; }; config { pins = "gpio6", "gpio110"; drive-strength = <2>; /* 2 MA */ bias-disable; }; }; nfc_clk_req_active: nfc_clk_req_active { /* active state */ mux { /* GPIO 7: NFC CLOCK REQUEST */ pins = "gpio7"; function = "gpio"; }; config { pins = "gpio7"; drive-strength = <2>; /* 2 MA */ bias-pull-up; }; }; nfc_clk_req_suspend: nfc_clk_req_suspend { /* sleep state */ mux { /* GPIO 7: NFC CLOCK REQUEST */ pins = "gpio7"; function = "gpio"; }; config { pins = "gpio7"; drive-strength = <2>; /* 2 MA */ bias-disable; }; }; }; /* SE 2 pin mappings */ qupv3_se2_i2c_pins: qupv3_se2_i2c_pins { qupv3_se2_i2c_active: qupv3_se2_i2c_active { Loading arch/arm64/boot/dts/qcom/kona-qrd.dtsi +23 −0 Original line number Diff line number Diff line Loading @@ -62,6 +62,29 @@ qcom,wsa-aux-dev-prefix = "SpkrRight", "SpkrRight"; }; &qupv3_se1_i2c { status = "ok"; qcom,clk-freq-out = <1000000>; #address-cells = <1>; #size-cells = <0>; nq@28 { compatible = "qcom,nq-nci"; reg = <0x28>; qcom,nq-irq = <&tlmm 111 0x00>; qcom,nq-ven = <&tlmm 6 0x00>; qcom,nq-firm = <&tlmm 110 0x00>; qcom,nq-clkreq = <&tlmm 7 0x00>; interrupt-parent = <&tlmm>; interrupts = <111 0>; interrupt-names = "nfc_irq"; pinctrl-names = "nfc_active", "nfc_suspend"; pinctrl-0 = <&nfc_int_active &nfc_enable_active &nfc_clk_req_active>; pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend &nfc_clk_req_suspend>; }; }; &ufsphy_mem { compatible = "qcom,ufs-phy-qmp-v4"; Loading Loading
arch/arm64/boot/dts/qcom/kona-cdp.dtsi +23 −0 Original line number Diff line number Diff line Loading @@ -30,6 +30,29 @@ &tert_mi2s_sd0_sleep>; }; &qupv3_se1_i2c { status = "ok"; qcom,clk-freq-out = <1000000>; #address-cells = <1>; #size-cells = <0>; nq@28 { compatible = "qcom,nq-nci"; reg = <0x28>; qcom,nq-irq = <&tlmm 111 0x00>; qcom,nq-ven = <&tlmm 6 0x00>; qcom,nq-firm = <&tlmm 110 0x00>; qcom,nq-clkreq = <&tlmm 7 0x00>; interrupt-parent = <&tlmm>; interrupts = <111 0>; interrupt-names = "nfc_irq"; pinctrl-names = "nfc_active", "nfc_suspend"; pinctrl-0 = <&nfc_int_active &nfc_enable_active &nfc_clk_req_active>; pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend &nfc_clk_req_suspend>; }; }; &ufsphy_mem { compatible = "qcom,ufs-phy-qmp-v4"; Loading
arch/arm64/boot/dts/qcom/kona-mtp.dtsi +23 −0 Original line number Diff line number Diff line Loading @@ -30,6 +30,29 @@ &tert_mi2s_sd0_sleep>; }; &qupv3_se1_i2c { status = "ok"; qcom,clk-freq-out = <1000000>; #address-cells = <1>; #size-cells = <0>; nq@28 { compatible = "qcom,nq-nci"; reg = <0x28>; qcom,nq-irq = <&tlmm 111 0x00>; qcom,nq-ven = <&tlmm 6 0x00>; qcom,nq-firm = <&tlmm 110 0x00>; qcom,nq-clkreq = <&tlmm 7 0x00>; interrupt-parent = <&tlmm>; interrupts = <111 0>; interrupt-names = "nfc_irq"; pinctrl-names = "nfc_active", "nfc_suspend"; pinctrl-0 = <&nfc_int_active &nfc_enable_active &nfc_clk_req_active>; pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend &nfc_clk_req_suspend>; }; }; &ufsphy_mem { compatible = "qcom,ufs-phy-qmp-v4"; Loading
arch/arm64/boot/dts/qcom/kona-pinctrl.dtsi +92 −0 Original line number Diff line number Diff line Loading @@ -2551,6 +2551,98 @@ }; }; nfc { nfc_int_active: nfc_int_active { /* active state */ mux { /* GPIO 111 NFC Read Interrupt */ pins = "gpio111"; function = "gpio"; }; config { pins = "gpio111"; drive-strength = <2>; /* 2 MA */ bias-pull-up; }; }; nfc_int_suspend: nfc_int_suspend { /* sleep state */ mux { /* GPIO 111 NFC Read Interrupt */ pins = "gpio111"; function = "gpio"; }; config { pins = "gpio111"; drive-strength = <2>; /* 2 MA */ bias-pull-up; }; }; nfc_enable_active: nfc_enable_active { /* active state */ mux { /* 6: Enable 110: Firmware */ pins = "gpio6", "gpio110"; function = "gpio"; }; config { pins = "gpio6", "gpio110"; drive-strength = <2>; /* 2 MA */ bias-pull-up; }; }; nfc_enable_suspend: nfc_enable_suspend { /* sleep state */ mux { /* 6: Enable 110: Firmware */ pins = "gpio6", "gpio110"; function = "gpio"; }; config { pins = "gpio6", "gpio110"; drive-strength = <2>; /* 2 MA */ bias-disable; }; }; nfc_clk_req_active: nfc_clk_req_active { /* active state */ mux { /* GPIO 7: NFC CLOCK REQUEST */ pins = "gpio7"; function = "gpio"; }; config { pins = "gpio7"; drive-strength = <2>; /* 2 MA */ bias-pull-up; }; }; nfc_clk_req_suspend: nfc_clk_req_suspend { /* sleep state */ mux { /* GPIO 7: NFC CLOCK REQUEST */ pins = "gpio7"; function = "gpio"; }; config { pins = "gpio7"; drive-strength = <2>; /* 2 MA */ bias-disable; }; }; }; /* SE 2 pin mappings */ qupv3_se2_i2c_pins: qupv3_se2_i2c_pins { qupv3_se2_i2c_active: qupv3_se2_i2c_active { Loading
arch/arm64/boot/dts/qcom/kona-qrd.dtsi +23 −0 Original line number Diff line number Diff line Loading @@ -62,6 +62,29 @@ qcom,wsa-aux-dev-prefix = "SpkrRight", "SpkrRight"; }; &qupv3_se1_i2c { status = "ok"; qcom,clk-freq-out = <1000000>; #address-cells = <1>; #size-cells = <0>; nq@28 { compatible = "qcom,nq-nci"; reg = <0x28>; qcom,nq-irq = <&tlmm 111 0x00>; qcom,nq-ven = <&tlmm 6 0x00>; qcom,nq-firm = <&tlmm 110 0x00>; qcom,nq-clkreq = <&tlmm 7 0x00>; interrupt-parent = <&tlmm>; interrupts = <111 0>; interrupt-names = "nfc_irq"; pinctrl-names = "nfc_active", "nfc_suspend"; pinctrl-0 = <&nfc_int_active &nfc_enable_active &nfc_clk_req_active>; pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend &nfc_clk_req_suspend>; }; }; &ufsphy_mem { compatible = "qcom,ufs-phy-qmp-v4"; Loading