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Commit 4753219d authored by Boris Brezillon's avatar Boris Brezillon Committed by Nicolas Ferre
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ARM: at91/dt: move sama5d3 SoC to the new main/slow clk model 



Replace the old main and clk definitions (fixed rate clk) by the new main and
slow clk subtree definition (ck = mux(rc_osc, osc)).

Signed-off-by: default avatarBoris BREZILLON <boris.brezillon@free-electrons.com>
Signed-off-by: default avatarNicolas Ferre <nicolas.ferre@atmel.com>
parent 4d735e54

arch/arm/boot/dts/sama5d3.dtsi

+55 −6
Original line number Diff line number Diff line
@@ -58,6 +58,18 @@ 
		reg = <0x20000000 0x8000000>;

	};



	slow_xtal: slow_xtal {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <0>;

	};



	main_xtal: main_xtal {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <0>;

	};



	clocks {

		adc_op_clk: adc_op_clk{

			compatible = "fixed-clock";
@@ -749,18 +761,29 @@ 
				#size-cells = <0>;

				#interrupt-cells = <1>;



				clk32k: slck {

					compatible = "fixed-clock";

				main_rc_osc: main_rc_osc {

					compatible = "atmel,at91sam9x5-clk-main-rc-osc";

					#clock-cells = <0>;

					clock-frequency = <32768>;

					interrupt-parent = <&pmc>;

					interrupts = <AT91_PMC_MOSCRCS>;

					clock-frequency = <12000000>;

					clock-accuracy = <50000000>;

				};



				main: mainck {

					compatible = "atmel,at91rm9200-clk-main";

				main_osc: main_osc {

					compatible = "atmel,at91rm9200-clk-main-osc";

					#clock-cells = <0>;

					interrupt-parent = <&pmc>;

					interrupts = <AT91_PMC_MOSCS>;

					clocks = <&clk32k>;

					clocks = <&main_xtal>;

				};



				main: mainck {

					compatible = "atmel,at91sam9x5-clk-main";

					#clock-cells = <0>;

					interrupt-parent = <&pmc>;

					interrupts = <AT91_PMC_MOSCSELS>;

					clocks = <&main_rc_osc &main_osc>;

				};



				plla: pllack {
@@ -1089,6 +1112,32 @@ 
				status = "disabled";

			};



			sckc@fffffe50 {

				compatible = "atmel,at91sam9x5-sckc";

				reg = <0xfffffe50 0x4>;



				slow_rc_osc: slow_rc_osc {

					compatible = "atmel,at91sam9x5-clk-slow-rc-osc";

					#clock-cells = <0>;

					clock-frequency = <32768>;

					clock-accuracy = <50000000>;

					atmel,startup-time-usec = <75>;

				};



				slow_osc: slow_osc {

					compatible = "atmel,at91sam9x5-clk-slow-osc";

					#clock-cells = <0>;

					clocks = <&slow_xtal>;

					atmel,startup-time-usec = <1200000>;

				};



				clk32k: slowck {

					compatible = "atmel,at91sam9x5-clk-slow";

					#clock-cells = <0>;

					clocks = <&slow_rc_osc &slow_osc>;

				};

			};



			rtc@fffffeb0 {

				compatible = "atmel,at91rm9200-rtc";

				reg = <0xfffffeb0 0x30>;