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Commit 472c95a6 authored by Andrzej Hajda's avatar Andrzej Hajda Committed by Kukjin Kim
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dt-bindings: add asynchronous bridge clock for exynos 



The patch adds bindings for clocks required by async-bridges
present in the particular power domain.

Signed-off-by: default avatarAndrzej Hajda <a.hajda@samsung.com>
Reviewed-by: default avatarJavier Martinez Canillas <javier.martinez@collabora.co.uk>
Tested-by: default avatarJavier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: default avatarKukjin Kim <kgene@kernel.org>
parent 46a0b9ff

Documentation/devicetree/bindings/arm/exynos/power_domain.txt

+3 −0
Original line number Diff line number Diff line
@@ -22,6 +22,9 @@ Optional Properties: 
	- pclkN, clkN: Pairs of parent of input clock and input clock to the

		devices in this power domain. Maximum of 4 pairs (N = 0 to 3)

		are supported currently.

	- asbN: Clocks required by asynchronous bridges (ASB) present in

		the power domain. These clock should be enabled during power

		domain on/off operations.



Node of a device using power domains must have a power-domains property

defined with a phandle to respective power domain.