Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 46ddcc75 authored by Christoph Niedermaier's avatar Christoph Niedermaier Committed by Greg Kroah-Hartman
Browse files

cpufreq: imx6q: don't warn for disabling a non-existing frequency 



[ Upstream commit 11a3b0ac33d95aa84be426e801f800997262a225 ]

It is confusing if a warning is given for disabling a non-existent
frequency of the operating performance points (OPP). In this case
the function dev_pm_opp_disable() returns -ENODEV. Check the return
value and avoid the output of a warning in this case. Avoid code
duplication by using a separate function.

Signed-off-by: default avatarChristoph Niedermaier <cniedermaier@dh-electronics.com>
[ Viresh : Updated commit subject ]
Signed-off-by: default avatarViresh Kumar <viresh.kumar@linaro.org>
Stable-dep-of: 2e4e0984c7d6 ("cpufreq: imx6q: Don't disable 792 Mhz OPP unnecessarily")
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent 904f9c14

drivers/cpufreq/imx6q-cpufreq.c

+16 −14
Original line number Diff line number Diff line
@@ -240,6 +240,14 @@ static struct cpufreq_driver imx6q_cpufreq_driver = { 
	.suspend = cpufreq_generic_suspend,

};



static void imx6x_disable_freq_in_opp(struct device *dev, unsigned long freq)

{

	int ret = dev_pm_opp_disable(dev, freq);



	if (ret < 0 && ret != -ENODEV)

		dev_warn(dev, "failed to disable %ldMHz OPP\n", freq / 1000000);

}



#define OCOTP_CFG3			0x440

#define OCOTP_CFG3_SPEED_SHIFT		16

#define OCOTP_CFG3_SPEED_1P2GHZ		0x3
@@ -275,17 +283,15 @@ static void imx6q_opp_check_speed_grading(struct device *dev) 
	val &= 0x3;



	if (val < OCOTP_CFG3_SPEED_996MHZ)

		if (dev_pm_opp_disable(dev, 996000000))

			dev_warn(dev, "failed to disable 996MHz OPP\n");

		imx6x_disable_freq_in_opp(dev, 996000000);



	if (of_machine_is_compatible("fsl,imx6q") ||

	    of_machine_is_compatible("fsl,imx6qp")) {

		if (val != OCOTP_CFG3_SPEED_852MHZ)

			if (dev_pm_opp_disable(dev, 852000000))

				dev_warn(dev, "failed to disable 852MHz OPP\n");

			imx6x_disable_freq_in_opp(dev, 852000000);



		if (val != OCOTP_CFG3_SPEED_1P2GHZ)

			if (dev_pm_opp_disable(dev, 1200000000))

				dev_warn(dev, "failed to disable 1.2GHz OPP\n");

			imx6x_disable_freq_in_opp(dev, 1200000000);

	}

	iounmap(base);

put_node:
@@ -338,20 +344,16 @@ static int imx6ul_opp_check_speed_grading(struct device *dev) 
	val >>= OCOTP_CFG3_SPEED_SHIFT;

	val &= 0x3;



	if (of_machine_is_compatible("fsl,imx6ul")) {

	if (of_machine_is_compatible("fsl,imx6ul"))

		if (val != OCOTP_CFG3_6UL_SPEED_696MHZ)

			if (dev_pm_opp_disable(dev, 696000000))

				dev_warn(dev, "failed to disable 696MHz OPP\n");

	}

			imx6x_disable_freq_in_opp(dev, 696000000);



	if (of_machine_is_compatible("fsl,imx6ull")) {

		if (val != OCOTP_CFG3_6ULL_SPEED_792MHZ)

			if (dev_pm_opp_disable(dev, 792000000))

				dev_warn(dev, "failed to disable 792MHz OPP\n");

			imx6x_disable_freq_in_opp(dev, 792000000);



		if (val != OCOTP_CFG3_6ULL_SPEED_900MHZ)

			if (dev_pm_opp_disable(dev, 900000000))

				dev_warn(dev, "failed to disable 900MHz OPP\n");

			imx6x_disable_freq_in_opp(dev, 900000000);

	}



	return ret;