Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 46ae0e37 authored by Laurent Pinchart's avatar Laurent Pinchart Committed by Simon Horman
Browse files

ARM: dts: sh73a0: Rename the serial port clock to fck



The clock is really the device functional clock, not the interface
clock. Rename it.

Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 06930a1f
Loading
Loading
Loading
Loading
+9 −9
Original line number Diff line number Diff line
@@ -359,7 +359,7 @@
		reg = <0xe6c40000 0x100>;
		interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&mstp2_clks SH73A0_CLK_SCIFA0>;
		clock-names = "sci_ick";
		clock-names = "fck";
		power-domains = <&pd_a3sp>;
		status = "disabled";
	};
@@ -369,7 +369,7 @@
		reg = <0xe6c50000 0x100>;
		interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&mstp2_clks SH73A0_CLK_SCIFA1>;
		clock-names = "sci_ick";
		clock-names = "fck";
		power-domains = <&pd_a3sp>;
		status = "disabled";
	};
@@ -379,7 +379,7 @@
		reg = <0xe6c60000 0x100>;
		interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&mstp2_clks SH73A0_CLK_SCIFA2>;
		clock-names = "sci_ick";
		clock-names = "fck";
		power-domains = <&pd_a3sp>;
		status = "disabled";
	};
@@ -389,7 +389,7 @@
		reg = <0xe6c70000 0x100>;
		interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&mstp2_clks SH73A0_CLK_SCIFA3>;
		clock-names = "sci_ick";
		clock-names = "fck";
		power-domains = <&pd_a3sp>;
		status = "disabled";
	};
@@ -399,7 +399,7 @@
		reg = <0xe6c80000 0x100>;
		interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&mstp2_clks SH73A0_CLK_SCIFA4>;
		clock-names = "sci_ick";
		clock-names = "fck";
		power-domains = <&pd_a3sp>;
		status = "disabled";
	};
@@ -409,7 +409,7 @@
		reg = <0xe6cb0000 0x100>;
		interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&mstp2_clks SH73A0_CLK_SCIFA5>;
		clock-names = "sci_ick";
		clock-names = "fck";
		power-domains = <&pd_a3sp>;
		status = "disabled";
	};
@@ -419,7 +419,7 @@
		reg = <0xe6cc0000 0x100>;
		interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&mstp3_clks SH73A0_CLK_SCIFA6>;
		clock-names = "sci_ick";
		clock-names = "fck";
		power-domains = <&pd_a3sp>;
		status = "disabled";
	};
@@ -429,7 +429,7 @@
		reg = <0xe6cd0000 0x100>;
		interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&mstp2_clks SH73A0_CLK_SCIFA7>;
		clock-names = "sci_ick";
		clock-names = "fck";
		power-domains = <&pd_a3sp>;
		status = "disabled";
	};
@@ -439,7 +439,7 @@
		reg = <0xe6c30000 0x100>;
		interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&mstp2_clks SH73A0_CLK_SCIFB>;
		clock-names = "sci_ick";
		clock-names = "fck";
		power-domains = <&pd_a3sp>;
		status = "disabled";
	};