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Commit 4635fdc6 authored by Bin Gao's avatar Bin Gao Committed by Thomas Gleixner
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x86/tsc: Mark Intel ATOM_GOLDMONT TSC reliable 



On Intel GOLDMONT Atom SoC TSC is the only available clocksource, so there
is no way to do software calibration or have a watchdog clocksource for it.
Software calibration is already disabled via the TSC_KNOWN_FREQ flag, but
the watchdog requirement still persists, so such systems cannot switch to
high resolution/nohz mode.

Mark it reliable, so it becomes usable. Hardware teams confirmed that this
is safe on that SoC.

Signed-off-by: default avatarBin Gao <bin.gao@intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/r/1479241644-234277-4-git-send-email-bin.gao@linux.intel.com


Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
parent 4ca4df0b

arch/x86/kernel/tsc.c

+7 −0
Original line number Diff line number Diff line
@@ -709,6 +709,13 @@ unsigned long native_calibrate_tsc(void) 
	 */

	setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ);



	/*

	 * For Atom SoCs TSC is the only reliable clocksource.

	 * Mark TSC reliable so no watchdog on it.

	 */

	if (boot_cpu_data.x86_model == INTEL_FAM6_ATOM_GOLDMONT)

		setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE);



	return crystal_khz * ebx_numerator / eax_denominator;

}