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Commit 460c3b00 authored by Sandy Huang's avatar Sandy Huang
Browse files

drm/rockchip: vop: add rk3126 vop support 



RK3126 vop register layout is similar with rk3036, so some feature
can reuse with rk3036.

RK3126 support two overlay plane and one hwc plane, max output
resolution is 1080p. it support IOMMU, and its IOMMU same as
rk3288's

Signed-off-by: default avatarSandy Huang <hjc@rock-chips.com>
Reviewed-by: default avatarMark Yao <mark.yao@rock-chips.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1510658857-90299-1-git-send-email-hjc@rock-chips.com
parent 5926466f

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

+30 −0
Original line number Original line Diff line number Diff line
@@ -149,6 +149,34 @@ static const struct vop_data rk3036_vop = { 
	.win_size = ARRAY_SIZE(rk3036_vop_win_data),

	.win_size = ARRAY_SIZE(rk3036_vop_win_data),

};

};





static const struct vop_win_phy rk3126_win1_data = {

	.data_formats = formats_win_lite,

	.nformats = ARRAY_SIZE(formats_win_lite),

	.enable = VOP_REG(RK3036_SYS_CTRL, 0x1, 1),

	.format = VOP_REG(RK3036_SYS_CTRL, 0x7, 6),

	.rb_swap = VOP_REG(RK3036_SYS_CTRL, 0x1, 19),

	.dsp_info = VOP_REG(RK3126_WIN1_DSP_INFO, 0x0fff0fff, 0),

	.dsp_st = VOP_REG(RK3126_WIN1_DSP_ST, 0x1fff1fff, 0),

	.yrgb_mst = VOP_REG(RK3126_WIN1_MST, 0xffffffff, 0),

	.yrgb_vir = VOP_REG(RK3036_WIN1_VIR, 0xffff, 0),

};



static const struct vop_win_data rk3126_vop_win_data[] = {

	{ .base = 0x00, .phy = &rk3036_win0_data,

	  .type = DRM_PLANE_TYPE_PRIMARY },

	{ .base = 0x00, .phy = &rk3126_win1_data,

	  .type = DRM_PLANE_TYPE_CURSOR },

};



static const struct vop_data rk3126_vop = {

	.intr = &rk3036_intr,

	.common = &rk3036_common,

	.modeset = &rk3036_modeset,

	.output = &rk3036_output,

	.win = rk3126_vop_win_data,

	.win_size = ARRAY_SIZE(rk3126_vop_win_data),

};



static const struct vop_scl_extension rk3288_win_full_scl_ext = {

static const struct vop_scl_extension rk3288_win_full_scl_ext = {

	.cbcr_vsd_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 31),

	.cbcr_vsd_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 31),

	.cbcr_vsu_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 30),

	.cbcr_vsu_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 30),
@@ -510,6 +538,8 @@ static const struct vop_data rk3328_vop = { 
static const struct of_device_id vop_driver_dt_match[] = {

static const struct of_device_id vop_driver_dt_match[] = {

	{ .compatible = "rockchip,rk3036-vop",

	{ .compatible = "rockchip,rk3036-vop",

	  .data = &rk3036_vop },

	  .data = &rk3036_vop },

	{ .compatible = "rockchip,rk3126-vop",

	  .data = &rk3126_vop },

	{ .compatible = "rockchip,rk3288-vop",

	{ .compatible = "rockchip,rk3288-vop",

	  .data = &rk3288_vop },

	  .data = &rk3288_vop },

	{ .compatible = "rockchip,rk3368-vop",

	{ .compatible = "rockchip,rk3368-vop",

drivers/gpu/drm/rockchip/rockchip_vop_reg.h

+6 −0
Original line number Original line Diff line number Diff line
@@ -878,4 +878,10 @@ 
#define RK3036_HWC_LUT_ADDR		0x800

#define RK3036_HWC_LUT_ADDR		0x800

/* rk3036 register definition end */

/* rk3036 register definition end */





/* rk3126 register definition */

#define RK3126_WIN1_MST			0x4c

#define RK3126_WIN1_DSP_INFO		0x50

#define RK3126_WIN1_DSP_ST		0x54

/* rk3126 register definition end */



#endif /* _ROCKCHIP_VOP_REG_H */
 
#endif /* _ROCKCHIP_VOP_REG_H */