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Commit 45da7b04 authored by Russell King's avatar Russell King
Browse files

dmaengine: omap-dma: use cached CCR value when enabling DMA 



We don't need to read-modify-write the CCR register; we already know
what value it should contain at this point.  Use the cached CCR value
when setting the enable bit.

Acked-by: default avatarTony Lindgren <tony@atomide.com>
Acked-by: default avatarVinod Koul <vinod.koul@intel.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 59871902

drivers/dma/omap-dma.c

+2 −4
Original line number Diff line number Diff line
@@ -181,7 +181,6 @@ static void omap_dma_clear_csr(struct omap_chan *c) 
static void omap_dma_start(struct omap_chan *c, struct omap_desc *d)

{

	struct omap_dmadev *od = to_omap_dma_dev(c->vc.chan.device);

	uint32_t val;



	if (__dma_omap15xx(od->plat->dma_attr))

		c->plat->dma_write(0, CPC, c->dma_ch);
@@ -193,9 +192,8 @@ static void omap_dma_start(struct omap_chan *c, struct omap_desc *d) 
	/* Enable interrupts */

	c->plat->dma_write(d->cicr, CICR, c->dma_ch);



	val = c->plat->dma_read(CCR, c->dma_ch);

	val |= CCR_ENABLE;

	c->plat->dma_write(val, CCR, c->dma_ch);

	/* Enable channel */

	c->plat->dma_write(d->ccr | CCR_ENABLE, CCR, c->dma_ch);

}



static void omap_dma_stop(struct omap_chan *c)