Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 45d882da authored by Marek Szyprowski's avatar Marek Szyprowski Committed by Sylwester Nawrocki
Browse files

clk: samsung: Add explicit MPLL, EPLL clkdev aliases in S3C2443 driver 



S3C2443 platform still use non-dt based lookup in some of its drivers
to get MPLL and EPLL clocks. Till now it worked only because PLL()
macro implicitly created aliases for all instantiated clocks. This
feature will be removed, so explicitly create aliases for MPLL and
EPLL clocks.

Signed-off-by: default avatarMarek Szyprowski <m.szyprowski@samsung.com>
Acked-by: default avatarChanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: default avatarSylwester Nawrocki <s.nawrocki@samsung.com>
parent cd05417f

drivers/clk/samsung/clk-s3c2443.c

+6 −4
Original line number Diff line number Diff line
@@ -191,6 +191,8 @@ struct samsung_gate_clock s3c2443_common_gates[] __initdata = { 
struct samsung_clock_alias s3c2443_common_aliases[] __initdata = {

	ALIAS(MSYSCLK, NULL, "msysclk"),

	ALIAS(ARMCLK, NULL, "armclk"),

	ALIAS(MPLL, NULL, "mpll"),

	ALIAS(EPLL, NULL, "epll"),

	ALIAS(HCLK, NULL, "hclk"),

	ALIAS(HCLK_SSMC, NULL, "nand"),

	ALIAS(PCLK_UART0, "s3c2440-uart.0", "uart"),
@@ -223,9 +225,9 @@ struct samsung_clock_alias s3c2443_common_aliases[] __initdata = { 
/* S3C2416 specific clocks */



static struct samsung_pll_clock s3c2416_pll_clks[] __initdata = {

	[mpll] = PLL(pll_6552_s3c2416, 0, "mpll", "mpllref",

	[mpll] = PLL(pll_6552_s3c2416, MPLL, "mpll", "mpllref",

						LOCKCON0, MPLLCON, NULL),

	[epll] = PLL(pll_6553, 0, "epll", "epllref",

	[epll] = PLL(pll_6553, EPLL, "epll", "epllref",

						LOCKCON1, EPLLCON, NULL),

};
@@ -277,9 +279,9 @@ struct samsung_clock_alias s3c2416_aliases[] __initdata = { 
/* S3C2443 specific clocks */



static struct samsung_pll_clock s3c2443_pll_clks[] __initdata = {

	[mpll] = PLL(pll_3000, 0, "mpll", "mpllref",

	[mpll] = PLL(pll_3000, MPLL, "mpll", "mpllref",

						LOCKCON0, MPLLCON, NULL),

	[epll] = PLL(pll_2126, 0, "epll", "epllref",

	[epll] = PLL(pll_2126, EPLL, "epll", "epllref",

						LOCKCON1, EPLLCON, NULL),

};

include/dt-bindings/clock/s3c2443.h

+2 −0
Original line number Diff line number Diff line
@@ -26,6 +26,8 @@ 
#define ARMCLK			4

#define HCLK			5

#define PCLK			6

#define MPLL			7

#define EPLL			8



/* Special clocks */

#define SCLK_HSSPI0		16