Merge tag 'LA.UM.9.12.r1-17400-SMxx50.QSSI13.0' of... (44dd4522) · Commits · e / devices / android_kernel_fairphone_FP4

drivers/staging/fw-api/fw/htt.h

+293 −5

Original line number	Diff line number	Diff line
		@@ -251,9 +251,13 @@
		* 3.123 Add HTT_OPTION_TLV_TCL_METADATA_V21 def.
		* 3.124 Add HTT_T2H_MSG_TYPE_PEER_EXTENDED_EVENT def.
		* 3.125 Expand fisa_aggr_limit bits in fisa_control_bits_v2.
		* 3.126 Add HTT_RXDATA_ERR_INVALID_PEER def.
		* 3.127 Add transmit_count fields in htt_tx_wbm_completion_vX structs.
		* 3.128 Add H2T TX_LATENCY_STATS_CFG + T2H TX_LATENCY_STATS_PERIODIC_IND
		* msg defs
		*/
		#define HTT_CURRENT_VERSION_MAJOR 3
		#define HTT_CURRENT_VERSION_MINOR 125
		#define HTT_CURRENT_VERSION_MINOR 128

		#define HTT_NUM_TX_FRAG_DESC 1024

		@@ -807,6 +811,8 @@ typedef enum {
		HTT_STATS_PDEV_TDMA_TAG = 187, /* htt_pdev_tdma_stats_tlv */
		HTT_STATS_CODEL_SVC_CLASS_TAG = 188, /* htt_codel_svc_class_stats_tlv */
		HTT_STATS_CODEL_MSDUQ_TAG = 189, /* htt_codel_msduq_stats_tlv */
		HTT_STATS_MLO_SCHED_STATS_TAG = 190, /* htt_mlo_sched_stats_tlv */
		HTT_STATS_PDEV_MLO_IPC_STATS_TAG = 191, /* htt_pdev_mlo_ipc_stats_tlv */


		HTT_STATS_MAX_TAG,
		@@ -879,6 +885,7 @@ enum htt_h2t_msg_type {
		HTT_H2T_MSG_TYPE_UMAC_HANG_RECOVERY_SOC_START_PRE_RESET = 0x22,
		HTT_H2T_MSG_TYPE_RX_CCE_SUPER_RULE_SETUP = 0x23,
		HTT_H2T_MSG_TYPE_PRIMARY_LINK_PEER_MIGRATE_RESP = 0x24,
		HTT_H2T_MSG_TYPE_TX_LATENCY_STATS_CFG = 0x25,

		/* keep this last */
		HTT_H2T_NUM_MSGS
		@@ -2876,7 +2883,8 @@ PREPACK struct htt_tx_wbm_completion_v2 {
		tx_status: 4, /* Takes enum values of htt_tx_fw2wbm_tx_status_t */
		reinject_reason: 4, /* Takes enum values of htt_tx_fw2wbm_reinject_reason_t */
		exception_frame: 1,
		rsvd0: 12, /* For future use */
		transmit_count: 7, /* Refer to struct wbm_release_ring */
		rsvd0: 5, /* For future use */
		used_by_hw4: 1, /* wbm_internal_error bit being used by HW */
		rsvd1: 1; /* For future use */
		A_UINT32
		@@ -2902,6 +2910,8 @@ PREPACK struct htt_tx_wbm_completion_v2 {
		#define HTT_TX_WBM_COMPLETION_V2_REINJECT_REASON_S 13
		#define HTT_TX_WBM_COMPLETION_V2_EXP_FRAME_M 0x00020000
		#define HTT_TX_WBM_COMPLETION_V2_EXP_FRAME_S 17
		#define HTT_TX_WBM_COMPLETION_V2_TRANSMIT_COUNT_M 0x01FC0000
		#define HTT_TX_WBM_COMPLETION_V2_TRANSMIT_COUNT_S 18

		/* DWORD 3 */
		#define HTT_TX_WBM_COMPLETION_V2_TX_STATUS_GET(_var) \
		@@ -2934,6 +2944,16 @@ PREPACK struct htt_tx_wbm_completion_v2 {
		((_var) \|= ((_val) << HTT_TX_WBM_COMPLETION_V2_EXP_FRAME_S)); \
		} while (0)

		#define HTT_TX_WBM_COMPLETION_V2_TRANSMIT_COUNT_GET(_var) \
		(((_var) & HTT_TX_WBM_COMPLETION_V2_TRANSMIT_COUNT_M) >> \
		HTT_TX_WBM_COMPLETION_V2_TRANSMIT_COUNT_S)

		#define HTT_TX_WBM_COMPLETION_V2_TRANSMIT_COUNT_SET(_var, _val) \
		do { \
		HTT_CHECK_SET_VAL(HTT_TX_WBM_COMPLETION_V2_TRANSMIT_COUNT, _val); \
		((_var) \|= ((_val) << HTT_TX_WBM_COMPLETION_V2_TRANSMIT_COUNT_S)); \
		} while (0)

		/**
		* @brief HTT TX WBM Completion from firmware to host (V3)
		* @details
		@@ -2959,7 +2979,8 @@ PREPACK struct htt_tx_wbm_completion_v3 {
		A_UINT32
		reinject_reason: 4, /* Takes enum values of htt_tx_fw2wbm_reinject_reason_t */
		exception_frame: 1,
		rsvd0: 27; /* For future use */
		transmit_count: 7, /* Refer to struct wbm_release_ring */
		rsvd0: 20; /* For future use */
		A_UINT32
		data0: 32; /* data0,1 and 2 changes based on tx_status type
		* if HTT_TX_FW2WBM_TX_STATUS_OK or HTT_TX_FW2WBM_TX_STATUS_DROP
		@@ -2976,13 +2997,17 @@ PREPACK struct htt_tx_wbm_completion_v3 {
		used_by_hw4: 12; /* Refer to struct wbm_release_ring */
		} POSTPACK;


		/* DWORD 3 */
		#define HTT_TX_WBM_COMPLETION_V3_TX_STATUS_M 0x0001E000
		#define HTT_TX_WBM_COMPLETION_V3_TX_STATUS_S 13

		/* DWORD 4 */
		#define HTT_TX_WBM_COMPLETION_V3_REINJECT_REASON_M 0x0000000F
		#define HTT_TX_WBM_COMPLETION_V3_REINJECT_REASON_S 0
		#define HTT_TX_WBM_COMPLETION_V3_EXP_FRAME_M 0x00000010
		#define HTT_TX_WBM_COMPLETION_V3_EXP_FRAME_S 4
		#define HTT_TX_WBM_COMPLETION_V3_TRANSMIT_COUNT_M 0x00000FE0
		#define HTT_TX_WBM_COMPLETION_V3_TRANSMIT_COUNT_S 5


		#define HTT_TX_WBM_COMPLETION_V3_TX_STATUS_GET(_var) \
		@@ -3015,6 +3040,16 @@ PREPACK struct htt_tx_wbm_completion_v3 {
		((_var) \|= ((_val) << HTT_TX_WBM_COMPLETION_V3_EXP_FRAME_S)); \
		} while (0)

		#define HTT_TX_WBM_COMPLETION_V3_TRANSMIT_COUNT_GET(_var) \
		(((_var) & HTT_TX_WBM_COMPLETION_V3_TRANSMIT_COUNT_M) >> \
		HTT_TX_WBM_COMPLETION_V3_TRANSMIT_COUNT_S)

		#define HTT_TX_WBM_COMPLETION_V3_TRANSMIT_COUNT_SET(_var, _val) \
		do { \
		HTT_CHECK_SET_VAL(HTT_TX_WBM_COMPLETION_V3_TRANSMIT_COUNT, _val); \
		((_var) \|= ((_val) << HTT_TX_WBM_COMPLETION_V3_TRANSMIT_COUNT_S)); \
		} while (0)


		typedef enum {
		TX_FRAME_TYPE_UNDEFINED = 0,
		@@ -3055,7 +3090,11 @@ PREPACK struct htt_tx_wbm_transmit_status {
		* contains valid data.
		*/
		frame_type: 4, /* holds htt_tx_wbm_status_frame_type value */
		reserved: 4;
		transmit_count_valid: 1, /* If this "transmit_count_valid" is set, the
		* transmit_count field in struct
		* htt_tx_wbm_completion_vx has valid data.
		*/
		reserved: 3;
		A_UINT32
		ppdu_start_tsf: 32; /* PPDU Start timestamp added for multicast
		* packets in the wbm completion path
		@@ -3079,6 +3118,10 @@ PREPACK struct htt_tx_wbm_transmit_status {
		#define HTT_TX_WBM_COMPLETION_V2_MCAST_S 22
		#define HTT_TX_WBM_COMPLETION_V2_MCAST_VALID_M 0x00800000
		#define HTT_TX_WBM_COMPLETION_V2_MCAST_VALID_S 23
		#define HTT_TX_WBM_COMPLETION_V2_FRAME_TYPE_M 0x0F000000
		#define HTT_TX_WBM_COMPLETION_V2_FRAME_TYPE_S 24
		#define HTT_TX_WBM_COMPLETION_V2_TRANSMIT_CNT_VALID_M 0x10000000
		#define HTT_TX_WBM_COMPLETION_V2_TRANSMIT_CNT_VALID_S 28

		/* DWORD 4 */
		#define HTT_TX_WBM_COMPLETION_V2_SCH_CMD_ID_GET(_var) \
		@@ -3152,6 +3195,26 @@ PREPACK struct htt_tx_wbm_transmit_status {
		((_var) \|= ((_val) << HTT_TX_WBM_COMPLETION_V2_MCAST_VALID_S)); \
		} while (0)

		#define HTT_TX_WBM_COMPLETION_V2_FRAME_TYPE_GET(_var) \
		(((_var) & HTT_TX_WBM_COMPLETION_V2_FRAME_TYPE_M) >> \
		HTT_TX_WBM_COMPLETION_V2_FRAME_TYPE_S)

		#define HTT_TX_WBM_COMPLETION_V2_FRAME_TYPE_SET(_var, _val) \
		do { \
		HTT_CHECK_SET_VAL(HTT_TX_WBM_COMPLETION_V2_FRAME_TYPE, _val); \
		((_var) \|= ((_val) << HTT_TX_WBM_COMPLETION_V2_FRAME_TYPE_S)); \

		#define HTT_TX_WBM_COMPLETION_V2_TRANSMIT_CNT_VALID_GET(_var) \
		(((_var) & HTT_TX_WBM_COMPLETION_V2_TRANSMIT_CNT_VALID_M) >> \
		HTT_TX_WBM_COMPLETION_V2_TRANSMIT_CNT_VALID_S)

		#define HTT_TX_WBM_COMPLETION_V2_TRANSMIT_CNT_VALID_SET(_var, _val) \
		do { \
		HTT_CHECK_SET_VAL(HTT_TX_WBM_COMPLETION_V2_MCAST_VALID, _val); \
		((_var) \|= ((_val) << HTT_TX_WBM_COMPLETION_V2_TRANSMIT_CNT_VALID_S)); \
		} while (0)


		/**
		* @brief HTT TX WBM reinject status from firmware to host
		* @details
		@@ -10714,6 +10777,88 @@ typedef struct {
		} while (0)


		/**
		* @brief host -> tgt msg to configure params for PPDU tx latency stats report
		*
		* MSG_TYPE => HTT_H2T_MSG_TYPE_TX_LATENCY_STATS_CFG
		*
		* @details
		* HTT_H2T_MSG_TYPE_TX_LATENCY_STATS_CFG message is sent by the host to
		* configure the parameters needed for FW to report PPDU tx latency stats
		* for latency prediction in user space.
		*
		* The message would appear as follows:
		* \|31 28\|27 12\|11\|10 8\|7 0\|
		* \|-----------+-------------------+--+-------+--------------\|
		* \|granularity\| periodic interval \| E\|vdev ID\| msg type \|
		* \|-----------+-------------------+--+-------+--------------\|
		* Where: E = enable
		*
		* The message is interpreted as follows:
		* dword0 - b'0:7 - msg_type: This will be set to 0x25
		* (HTT_H2T_MSG_TYPE_TX_LATENCY_STATS_CFG)
		* b'8:10 - vdev_id: Indicate which vdev is configuration is for
		* b'11 - enable: Indicate this message is to enable/disable
		* PPDU latency report from FW
		* b'12:27 - periodic_interval: Indicate the report interval in MS
		* b'28:31 - granularity: Indicate the granularity of the latency
		* stats report, in ms
		*/

		/* HTT_H2T_MSG_TYPE_TX_LATENCY_STATS_CFG */
		PREPACK struct htt_h2t_tx_latency_stats_cfg {
		A_UINT32 msg_type :8,
		vdev_id :3,
		enable :1,
		periodic_interval :16,
		granularity :4;
		} POSTPACK;

		#define HTT_H2T_TX_LATENCY_STATS_CFG_VDEV_ID_M 0x00000700
		#define HTT_H2T_TX_LATENCY_STATS_CFG_VDEV_ID_S 8
		#define HTT_H2T_TX_LATENCY_STATS_CFG_VDEV_ID_GET(_var) \
		(((_var) & HTT_H2T_TX_LATENCY_STATS_CFG_VDEV_ID_M) >> \
		HTT_H2T_TX_LATENCY_STATS_CFG_VDEV_ID_S)
		#define HTT_H2T_TX_LATENCY_STATS_CFG_VDEV_ID_SET(_var, _val) \
		do { \
		HTT_CHECK_SET_VAL(HTT_H2T_TX_LATENCY_STATS_CFG_VDEV_ID, _val); \
		((_var) \|= ((_val) << HTT_H2T_TX_LATENCY_STATS_CFG_VDEV_ID_S)); \
		} while (0)

		#define HTT_H2T_TX_LATENCY_STATS_CFG_ENABLE_M 0x00000800
		#define HTT_H2T_TX_LATENCY_STATS_CFG_ENABLE_S 11
		#define HTT_H2T_TX_LATENCY_STATS_CFG_ENABLE_GET(_var) \
		(((_var) & HTT_H2T_TX_LATENCY_STATS_CFG_ENABLE_M) >> \
		HTT_H2T_TX_LATENCY_STATS_CFG_ENABLE_S)
		#define HTT_H2T_TX_LATENCY_STATS_CFG_ENABLE_SET(_var, _val) \
		do { \
		HTT_CHECK_SET_VAL(HTT_H2T_TX_LATENCY_STATS_CFG_ENABLE, _val); \
		((_var) \|= ((_val) << HTT_H2T_TX_LATENCY_STATS_CFG_ENABLE_S)); \
		} while (0)

		#define HTT_H2T_TX_LATENCY_STATS_CFG_PERIODIC_INTERVAL_M 0x0FFFF000
		#define HTT_H2T_TX_LATENCY_STATS_CFG_PERIODIC_INTERVAL_S 12
		#define HTT_H2T_TX_LATENCY_STATS_CFG_PERIODIC_INTERVAL_GET(_var) \
		(((_var) & HTT_H2T_TX_LATENCY_STATS_CFG_PERIODIC_INTERVAL_M) >> \
		HTT_H2T_TX_LATENCY_STATS_CFG_PERIODIC_INTERVAL_S)
		#define HTT_H2T_TX_LATENCY_STATS_CFG_PERIODIC_INTERVAL_SET(_var, _val) \
		do { \
		HTT_CHECK_SET_VAL(HTT_H2T_TX_LATENCY_STATS_CFG_PERIODIC_INTERVAL, _val); \
		((_var) \|= ((_val) << HTT_H2T_TX_LATENCY_STATS_CFG_PERIODIC_INTERVAL_S)); \
		} while (0)

		#define HTT_H2T_TX_LATENCY_STATS_CFG_GRANULARITY_M 0xF0000000
		#define HTT_H2T_TX_LATENCY_STATS_CFG_GRANULARITY_S 28
		#define HTT_H2T_TX_LATENCY_STATS_CFG_GRANULARITY_GET(_var) \
		(((_var) & HTT_H2T_TX_LATENCY_STATS_CFG_GRANULARITY_M) >> \
		HTT_H2T_TX_LATENCY_STATS_CFG_GRANULARITY_S)
		#define HTT_H2T_TX_LATENCY_STATS_CFG_GRANULARITY_SET(_var, _val) \
		do { \
		HTT_CHECK_SET_VAL(HTT_H2T_TX_LATENCY_STATS_CFG_GRANULARITY, _val); \
		((_var) \|= ((_val) << HTT_H2T_TX_LATENCY_STATS_CFG_GRANULARITY_S)); \
		} while (0)



		/=== target -> host messages ===============================================/

		@@ -10784,6 +10929,7 @@ enum htt_t2h_msg_type {
		HTT_T2H_MSG_TYPE_PRIMARY_LINK_PEER_MIGRATE_IND = 0x37,
		HTT_T2H_MSG_TYPE_PEER_AST_OVERRIDE_INDEX_IND = 0x38,
		HTT_T2H_MSG_TYPE_PEER_EXTENDED_EVENT = 0x39,
		HTT_T2H_MSG_TYPE_TX_LATENCY_STATS_PERIODIC_IND = 0x3a,


		HTT_T2H_MSG_TYPE_TEST,
		@@ -21383,6 +21529,12 @@ typedef enum htt_t2h_rx_data_msdu_err {
		*/
		HTT_RXDATA_ERR_ZERO_LEN_MSDU = 7,

		/* ERR_INVALID_PEER:
		* FW sets this error flag when MSDU is recived from invalid PEER
		* HOST decides to send DEAUTH or not, recyles buffer.
		*/
		HTT_RXDATA_ERR_INVALID_PEER = 8,

		/* add new error codes here */

		HTT_RXDATA_ERR_MAX = 32
		@@ -21925,5 +22077,141 @@ typedef struct {
		#define HTT_PEER_AST_OVERRIDE_INDEX_IND_BYTES 16


		/**
		* @brief target -> periodic report of tx latency to host
		*
		* MSG_TYPE => HTT_T2H_MSG_TYPE_TX_LATENCY_STATS_PERIODIC_IND
		*
		* @details
		* The message starts with a message header followed by one or more
		* htt_t2h_peer_tx_latency_stats structs, one for each peer within the vdev.
		* After each upload, these tx latency stats will be reset.
		*
		* \|31 24\|23 16\|15 14\|13 10\|9 8\|7 0\|
		* +-------------------------+-----+-----+---+----------\|
		* hdr \| \|pyld elem sz\| \| GR \| P \| msg type \|
		*- -\|=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-\|
		* pyld \| peer ID \|
		* \|----------------------------------------------------\|
		* \| peer_tx_latency[0] \|
		* \|----------------------------------------------------\|
		* 1st \| peer_tx_latency[1] \|
		* peer \|----------------------------------------------------\|
		* \| peer_tx_latency[2] \|
		* \|----------------------------------------------------\|
		* \| peer_tx_latency[3] \|
		* \|----------------------------------------------------\|
		* \| avg latency \|
		* \|=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-\|
		* \| peer ID \|
		* \|----------------------------------------------------\|
		* \| peer_tx_latency[0] \|
		* \|----------------------------------------------------\|
		* 2nd \| peer_tx_latency[1] \|
		* peer \|----------------------------------------------------\|
		* \| peer_tx_latency[2] \|
		* \|----------------------------------------------------\|
		* \| peer_tx_latency[3] \|
		* \|----------------------------------------------------\|
		* \| avg latency \|
		* \|=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-\|
		* Where:
		* P = pdev ID
		* GR = granularity
		*
		* @details
		* htt_t2h_tx_latency_stats_periodic_hdr_t:
		* - msg_type
		* Bits 7:0
		* Purpose: identifies this as a tx latency report message
		* Value: 0x3a (HTT_T2H_MSG_TYPE_TX_LATENCY_STATS_PERIODIC_IND)
		* - pdev_id
		* Bits 9:8
		* Purpose: Indicates which pdev this message is associated with.
		* - granularity
		* Bits 13:10
		* Purpose: specifies the granulairty of each tx latency bucket in MS.
		* There are 4 buckets in total. E.g. if granularity is set to 5 ms,
		* then the ranges for the 4 latency histogram buckets will be
		* 0-5ms, 5ms-10ms, 10ms-15ms, 15ms-max, respectively.
		* - payload_elem_size
		* Bits 23:16
		* Purpose: specifies the size of each element within the msg's payload
		* In other words, this field specified the value of
		* sizeof(htt_t2h_peer_tx_latency_stats) based on the target's
		* revision of the htt_t2h_peer_tx_latency_stats definition.
		* If the payload_elem_size reported in the message exceeds the
		* sizeof(htt_t2h_peer_tx_latency_stats) based on the host's
		* revision of the htt_t2h_peer_tx_latency_stats definition,
		* the host shall ignore the excess data.
		* Conversely, if the payload_elem_size reported in the message is
		* less than sizeof(htt_t2h_peer_tx_latency_stats) based on the host's
		* revision of the htt_t2h_peer_tx_latency_stats definition,
		* the host shall use 0x0 values for the portion of the data not
		* provided by the target.
		* The host can compare the payload_elem_size to the total size of
		* the message minus the size of the message header to determine
		* how many peer payload elements are present in the message.
		* - sw_peer_id
		* Purpose: The peer to which the following stats belong
		* - peer_tx_latency
		* Purpose: tx latency histogram for this peer, with 4 buckets whose
		* size (in milliseconds) is specified by the granularity field
		* - avg_latency
		* Purpose: average tx latency (in ms) for this peer in this report interval
		*/
		typedef struct {
		A_UINT32 msg_type: 8,
		pdev_id: 2,
		granularity: 4,
		reserved1: 2,
		payload_elem_size: 8,
		reserved2: 8;
		} htt_t2h_tx_latency_stats_periodic_hdr_t;

		#define HTT_T2H_TX_LATENCY_STATS_PERIODIC_IND_HDR_SIZE \
		(sizeof(htt_t2h_tx_latency_stats_periodic_hdr_t))
		#define HTT_PEER_TX_LATENCY_REPORT_BINS 4

		typedef struct _htt_tx_latency_stats {
		A_UINT32 peer_id;
		A_UINT32 peer_tx_latency[HTT_PEER_TX_LATENCY_REPORT_BINS];
		A_UINT32 avg_latency;
		} htt_t2h_peer_tx_latency_stats;

		#define HTT_T2H_TX_LATENCY_STATS_PERIODIC_IND_PDEV_ID_M 0x00000300
		#define HTT_T2H_TX_LATENCY_STATS_PERIODIC_IND_PDEV_ID_S 8

		#define HTT_T2H_TX_LATENCY_STATS_PERIODIC_IND_PDEV_ID_GET(_var) \
		(((_var) & HTT_T2H_TX_LATENCY_STATS_PERIODIC_IND_PDEV_ID_M) >> HTT_T2H_TX_LATENCY_STATS_PERIODIC_IND_PDEV_ID_S)
		#define HTT_T2H_TX_LATENCY_STATS_PERIODIC_IND_PDEV_ID_SET(_var, _val) \
		do { \
		HTT_CHECK_SET_VAL(HTT_T2H_TX_LATENCY_STATS_PERIODIC_IND_PDEV_ID, _val); \
		((_var) \|= ((_val) << HTT_T2H_TX_LATENCY_STATS_PERIODIC_IND_PDEV_ID_S)); \
		} while (0)

		#define HTT_T2H_TX_LATENCY_STATS_PERIODIC_IND_GRANULARITY_M 0x00003C00
		#define HTT_T2H_TX_LATENCY_STATS_PERIODIC_IND_GRANULARITY_S 10

		#define HTT_T2H_TX_LATENCY_STATS_PERIODIC_IND_GRANULARITY_GET(_var) \
		(((_var) & HTT_T2H_TX_LATENCY_STATS_PERIODIC_IND_GRANULARITY_M) >> HTT_T2H_TX_LATENCY_STATS_PERIODIC_IND_GRANULARITY_S)
		#define HTT_T2H_TX_LATENCY_STATS_PERIODIC_IND_GRANULARITY_SET(_var, _val) \
		do { \
		HTT_CHECK_SET_VAL(HTT_T2H_TX_LATENCY_STATS_PERIODIC_IND_GRANULARITY, _val); \
		((_var) \|= ((_val) << HTT_T2H_TX_LATENCY_STATS_PERIODIC_IND_GRANULARITY_S)); \
		} while (0)

		#define HTT_T2H_TX_LATENCY_STATS_PERIODIC_IND_PAYLOAD_ELEM_SIZE_M 0x00FF0000
		#define HTT_T2H_TX_LATENCY_STATS_PERIODIC_IND_PAYLOAD_ELEM_SIZE_S 16

		#define HTT_T2H_TX_LATENCY_STATS_PERIODIC_IND_PAYLOAD_ELEM_SIZE_GET(_var) \
		(((_var) & HTT_T2H_TX_LATENCY_STATS_PERIODIC_IND_PAYLOAD_ELEM_SIZE_M) >> HTT_T2H_TX_LATENCY_STATS_PERIODIC_IND_PAYLOAD_ELEM_SIZE_S)
		#define HTT_T2H_TX_LATENCY_STATS_PERIODIC_IND_PAYLOAD_ELEM_SIZE_SET(_var, _val) \
		do { \
		HTT_CHECK_SET_VAL(HTT_T2H_TX_LATENCY_STATS_PERIODIC_IND_PAYLOAD_ELEM_SIZE, _val); \
		((_var) \|= ((_val) << HTT_T2H_TX_LATENCY_STATS_PERIODIC_IND_PAYLOAD_ELEM_SIZE_S)); \
		} while (0)



		#endif

drivers/staging/fw-api/fw/htt_ppdu_stats.h

+42 −4

Original line number	Diff line number	Diff line
		@@ -1057,6 +1057,20 @@ typedef struct {
		((_var) \|= ((_val) << HTT_PPDU_STATS_USER_COMMON_TLV_CHAIN_ENABLE_BITS_S)); \
		} while (0)

		#define HTT_PPDU_STATS_USER_COMMON_TLV_IS_SMART_ULOFDMA_BASIC_TRIG_M 0x00010000
		#define HTT_PPDU_STATS_USER_COMMON_TLV_IS_SMART_ULOFDMA_BASIC_TRIG_S 16

		#define HTT_PPDU_STATS_USER_COMMON_TLV_IS_SMART_ULOFDMA_BASIC_TRIG_GET(_var) \
		(((_var) & HTT_PPDU_STATS_USER_COMMON_TLV_IS_SMART_ULOFDMA_BASIC_TRIG_M) >> \
		HTT_PPDU_STATS_USER_COMMON_TLV_IS_SMART_ULOFDMA_BASIC_TRIG_S)

		#define HTT_PPDU_STATS_USER_COMMON_TLV_IS_SMART_ULOFDMA_BASIC_TRIG_SET(_var, _val) \
		do { \
		HTT_CHECK_SET_VAL(HTT_PPDU_STATS_USER_COMMON_TLV_IS_SMART_ULOFDMA_BASIC_TRIG, _val); \
		((_var) \|= ((_val) << HTT_PPDU_STATS_USER_COMMON_TLV_IS_SMART_ULOFDMA_BASIC_TRIG_S)); \
		} while (0)


		#define HTT_PPDU_STATS_USER_COMMON_TLV_TX_PWR_CHAINS_PER_U32 4
		#define HTT_PPDU_STATS_USER_COMMON_TLV_TX_PWR_MASK 0x000000ff

		@@ -1194,10 +1208,15 @@ typedef struct {
		* Default value: 1
		* tx_pwr[0] value is used for all chains if chain_enable_bits field
		* is set to 1.
		*
		* is_smart_ulofdma_basic_trig:
		* To check if user grouped in UL OFDMA Basic Trigger Frame is
		* due to Smart Basic Trigger.
		*/
		A_UINT32 tx_pwr_multiplier : 8,
		chain_enable_bits : 8,
		reserved2 : 16;
		is_smart_ulofdma_basic_trig: 1,
		reserved2 : 15;

		/*
		* Transmit powers (signed values packed into unsigned bitfields)
		@@ -1819,6 +1838,19 @@ typedef enum HTT_PPDU_STATS_RESP_PPDU_TYPE HTT_PPDU_STATS_RESP_PPDU_TYPE;
		((_var) \|= ((_val) << HTT_PPDU_STATS_USER_RATE_TLV_EXTRA_EHT_LTF_S)); \
		} while (0)

		#define HTT_PPDU_STATS_USER_RATE_TLV_IS_MIN_RATE_M 0x00020000
		#define HTT_PPDU_STATS_USER_RATE_TLV_IS_MIN_RATE_S 17

		#define HTT_PPDU_STATS_USER_RATE_TLV_IS_MIN_RATE_GET(_var) \
		(((_var) & HTT_PPDU_STATS_USER_RATE_TLV_IS_MIN_RATE_M) >> \
		HTT_PPDU_STATS_USER_RATE_TLV_IS_MIN_RATE_S)

		#define HTT_PPDU_STATS_USER_RATE_TLV_IS_MIN_RATE_SET (_var , _val) \
		do { \
		HTT_CHECK_SET_VAL(HTT_PPDU_STATS_USER_RATE_TLV_IS_MIN_RATE, _val); \
		((_var) \|= ((_val) << HTT_PPDU_STATS_USER_RATE_TLV_IS_MIN_RATE_S)); \
		} while (0)

		typedef enum HTT_PPDU_STATS_RU_SIZE {
		HTT_PPDU_STATS_RU_26,
		HTT_PPDU_STATS_RU_52,
		@@ -2009,7 +2041,8 @@ typedef struct {
		*/
		A_UINT32 punc_pattern_bitmap: 16,
		extra_eht_ltf: 1,
		reserved4: 15;
		is_min_rate: 1,
		reserved4: 14;
		} htt_ppdu_stats_user_rate_tlv;

		#define HTT_PPDU_STATS_USR_RATE_VALID_M 0x80000000
		@@ -2479,6 +2512,11 @@ typedef struct {
		* for BW supported by Smart Antenna - 320 MHZ
		*/
		A_UINT32 max_rates_ext;

		/* hw_prot_dur_us:
		* hw protection frame's FES duration in micro seconds.
		*/
		A_UINT32 hw_prot_dur_us;
		} htt_ppdu_stats_user_cmpltn_common_tlv;

		#define HTT_PPDU_STATS_USER_CMPLTN_BA_BITMAP_TLV_TID_NUM_M 0x000000ff

drivers/staging/fw-api/fw/htt_stats.h

+376 −4

File changed.

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drivers/staging/fw-api/fw/wmi_services.h

+8 −0

Original line number	Diff line number	Diff line
		@@ -634,6 +634,14 @@ typedef enum {
		WMI_SERVICE_N_LINK_MLO_SUPPORT = 381, /* Indicate FW supports N MLO link & vdev re-purpose between links */
		WMI_SERVICE_ATF_MAX_CLIENT_512_SUPPORT = 382, /* Indicates FW supports maximum of 512 clients when ATF is enabled */
		WMI_SERVICE_FISA_DYNAMIC_MSDU_AGGR_SIZE_SUPPORT = 383, /* Indicates FW support for FISA aggregation size up to 64 instead of only 16 */
		WMI_SERVICE_BRIDGE_VDEV_SUPPORT = 384, /* Indicated FW supports Bridge VDEV */
		WMI_SERVICE_MLO_MODE1_RECOVERY_SUPPORTED = 385, /* Indicate fw support for mlo mode1 recovery */
		WMI_SERVICE_TX_PWR_PER_PPDU_STATS_SUPPORT = 386, /* FW support to check tx power stats per PPDU */
		WMI_SERVICE_DISABLE_WDS_PEER_MAP_UNMAP_EVENT_SUPPORT = 387, /* Indicate FW support to disable wds peer map/unmap events */
		WMI_SERVICE_PDEV_WSI_STATS_INFO_SUPPORT = 388, /* Support for WSI Stats Info. */
		WMI_SERVICE_MULTIPLE_RF_PATH_SOC_SUPPORT = 389, /* Indicates FW supports Multiple RF Path on SOC Level */
		WMI_SERVICE_RADAR_FLAGS_SUPPORT = 390, /* Indicates FW supports radar flags, such as full bandwidth need put to NOL */
		WMI_SERVICE_XPAN_SUPPORT = 391, /* Indicate FW support XPAN configuration */

		WMI_MAX_EXT2_SERVICE

drivers/staging/fw-api/fw/wmi_tlv_defs.h

+60 −7

File changed.

Preview size limit exceeded, changes collapsed.