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Commit 44a126ba authored by Paulo Zanoni's avatar Paulo Zanoni
Browse files

drm/i915: kill intel_ddi_pll_select() 



All it does is pick the encoder and call intel_get_shared_dpll(). We
can just do this in the caller. One less indirection level during code
reading.

As another plus, now the two callers of intel_get_shared_dpll() are
{ironlake,haswell}_crtc_compute_clock().

Reported-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1490209125-20046-2-git-send-email-paulo.r.zanoni@intel.com
parent 598b6b5a

drivers/gpu/drm/i915/intel_ddi.c

+2 −23
Original line number Diff line number Diff line
@@ -837,7 +837,8 @@ intel_ddi_get_crtc_encoder(struct intel_crtc *crtc) 
	return ret;

}



static struct intel_encoder *

/* Finds the only possible encoder associated with the given CRTC. */

struct intel_encoder *

intel_ddi_get_crtc_new_encoder(struct intel_crtc_state *crtc_state)

{

	struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
@@ -1127,28 +1128,6 @@ void intel_ddi_clock_get(struct intel_encoder *encoder, 
		bxt_ddi_clock_get(encoder, pipe_config);

}



/*

 * Tries to find a *shared* PLL for the CRTC and store it in

 * intel_crtc->ddi_pll_sel.

 *

 * For private DPLLs, compute_config() should do the selection for us. This

 * function should be folded into compute_config() eventually.

 */

bool intel_ddi_pll_select(struct intel_crtc *intel_crtc,

			  struct intel_crtc_state *crtc_state)

{

	struct intel_encoder *encoder =

		intel_ddi_get_crtc_new_encoder(crtc_state);

	struct intel_shared_dpll *pll;



	pll = intel_get_shared_dpll(intel_crtc, crtc_state, encoder);

	if (!pll)

		DRM_DEBUG_DRIVER("failed to find PLL for pipe %c\n",

				 pipe_name(intel_crtc->pipe));



	return pll != NULL;

}



void intel_ddi_set_pipe_settings(const struct intel_crtc_state *crtc_state)

{

	struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

drivers/gpu/drm/i915/intel_display.c

+7 −1
Original line number Diff line number Diff line
@@ -8835,9 +8835,15 @@ static int haswell_crtc_compute_clock(struct intel_crtc *crtc, 
				      struct intel_crtc_state *crtc_state)

{

	if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI)) {

		if (!intel_ddi_pll_select(crtc, crtc_state))

		struct intel_encoder *encoder =

			intel_ddi_get_crtc_new_encoder(crtc_state);



		if (!intel_get_shared_dpll(crtc, crtc_state, encoder)) {

			DRM_DEBUG_DRIVER("failed to find PLL for pipe %c\n",

					 pipe_name(crtc->pipe));

			return -EINVAL;

		}

	}



	crtc->lowfreq_avail = false;

drivers/gpu/drm/i915/intel_drv.h

+2 −2
Original line number Diff line number Diff line
@@ -1239,8 +1239,8 @@ void intel_ddi_disable_transcoder_func(struct drm_i915_private *dev_priv, 
				       enum transcoder cpu_transcoder);

void intel_ddi_enable_pipe_clock(const struct intel_crtc_state *crtc_state);

void intel_ddi_disable_pipe_clock(const  struct intel_crtc_state *crtc_state);

bool intel_ddi_pll_select(struct intel_crtc *crtc,

			  struct intel_crtc_state *crtc_state);

struct intel_encoder *

intel_ddi_get_crtc_new_encoder(struct intel_crtc_state *crtc_state);

void intel_ddi_set_pipe_settings(const struct intel_crtc_state *crtc_state);

void intel_ddi_prepare_link_retrain(struct intel_dp *intel_dp);

bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector);