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Unverified Commit 4483521d authored by Andrew F. Davis's avatar Andrew F. Davis Committed by Mark Brown
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ASoC: tlv320aic32x4: Use correct shift definition for DATATYPE bits 



Setting the DATATYPE bit field requires shifting our value by 6. Setting
the J value of the PLL also requires a shift by 6. Currently the code
abuses this fact and uses the shift for the PLL register to set the
data-type register. Fix this here by using the definition meant for
this register.

Signed-off-by: default avatarAndrew F. Davis <afd@ti.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 7e2a4dc5

sound/soc/codecs/tlv320aic32x4.c

+8 −6
Original line number Diff line number Diff line
@@ -641,21 +641,23 @@ static int aic32x4_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) 
	case SND_SOC_DAIFMT_I2S:

		break;

	case SND_SOC_DAIFMT_DSP_A:

		iface_reg_1 |= (AIC32X4_DSP_MODE << AIC32X4_PLLJ_SHIFT);

		iface_reg_1 |= (AIC32X4_DSP_MODE <<

				AIC32X4_IFACE1_DATATYPE_SHIFT);

		iface_reg_3 |= (1 << 3); /* invert bit clock */

		iface_reg_2 = 0x01; /* add offset 1 */

		break;

	case SND_SOC_DAIFMT_DSP_B:

		iface_reg_1 |= (AIC32X4_DSP_MODE << AIC32X4_PLLJ_SHIFT);

		iface_reg_1 |= (AIC32X4_DSP_MODE <<

				AIC32X4_IFACE1_DATATYPE_SHIFT);

		iface_reg_3 |= (1 << 3); /* invert bit clock */

		break;

	case SND_SOC_DAIFMT_RIGHT_J:

		iface_reg_1 |=

			(AIC32X4_RIGHT_JUSTIFIED_MODE << AIC32X4_PLLJ_SHIFT);

		iface_reg_1 |= (AIC32X4_RIGHT_JUSTIFIED_MODE <<

				AIC32X4_IFACE1_DATATYPE_SHIFT);

		break;

	case SND_SOC_DAIFMT_LEFT_J:

		iface_reg_1 |=

			(AIC32X4_LEFT_JUSTIFIED_MODE << AIC32X4_PLLJ_SHIFT);

		iface_reg_1 |= (AIC32X4_LEFT_JUSTIFIED_MODE <<

				AIC32X4_IFACE1_DATATYPE_SHIFT);

		break;

	default:

		printk(KERN_ERR "aic32x4: invalid DAI interface format\n");