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Commit 4420471f authored by Ingo Molnar's avatar Ingo Molnar
Browse files

Merge branch 'x86/apic' into irq/numa



Conflicts:
	arch/x86/kernel/apic/io_apic.c

Merge reason: non-trivial interaction between ongoing work in io_apic.c
              and the NUMA migration feature in the irq tree.

Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parents 15e957d0 e0e42142
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+3 −0
Original line number Original line Diff line number Diff line
@@ -1565,6 +1565,9 @@ and is between 256 and 4096 characters. It is defined in the file
	noinitrd	[RAM] Tells the kernel not to load any configured
	noinitrd	[RAM] Tells the kernel not to load any configured
			initial RAM disk.
			initial RAM disk.


	nointremap	[X86-64, Intel-IOMMU] Do not enable interrupt
			remapping.

	nointroute	[IA-64]
	nointroute	[IA-64]


	nojitter	[IA64] Disables jitter checking for ITC timers.
	nojitter	[IA64] Disables jitter checking for ITC timers.
+1 −1
Original line number Original line Diff line number Diff line
@@ -349,7 +349,7 @@ config X86_UV
	depends on X86_64
	depends on X86_64
	depends on X86_EXTENDED_PLATFORM
	depends on X86_EXTENDED_PLATFORM
	depends on NUMA
	depends on NUMA
	select X86_X2APIC
	depends on X86_X2APIC
	---help---
	---help---
	  This option is needed in order to support SGI Ultraviolet systems.
	  This option is needed in order to support SGI Ultraviolet systems.
	  If you don't have one of these, you should say N here.
	  If you don't have one of these, you should say N here.
+10 −18
Original line number Original line Diff line number Diff line
@@ -107,8 +107,7 @@ extern u32 native_safe_apic_wait_icr_idle(void);
extern void native_apic_icr_write(u32 low, u32 id);
extern void native_apic_icr_write(u32 low, u32 id);
extern u64 native_apic_icr_read(void);
extern u64 native_apic_icr_read(void);


#define EIM_8BIT_APIC_ID	0
extern int x2apic_mode;
#define EIM_32BIT_APIC_ID	1


#ifdef CONFIG_X86_X2APIC
#ifdef CONFIG_X86_X2APIC
/*
/*
@@ -166,10 +165,9 @@ static inline u64 native_x2apic_icr_read(void)
	return val;
	return val;
}
}


extern int x2apic, x2apic_phys;
extern int x2apic_phys;
extern void check_x2apic(void);
extern void check_x2apic(void);
extern void enable_x2apic(void);
extern void enable_x2apic(void);
extern void enable_IR_x2apic(void);
extern void x2apic_icr_write(u32 low, u32 id);
extern void x2apic_icr_write(u32 low, u32 id);
static inline int x2apic_enabled(void)
static inline int x2apic_enabled(void)
{
{
@@ -183,6 +181,8 @@ static inline int x2apic_enabled(void)
		return 1;
		return 1;
	return 0;
	return 0;
}
}

#define x2apic_supported()	(cpu_has_x2apic)
#else
#else
static inline void check_x2apic(void)
static inline void check_x2apic(void)
{
{
@@ -190,28 +190,20 @@ static inline void check_x2apic(void)
static inline void enable_x2apic(void)
static inline void enable_x2apic(void)
{
{
}
}
static inline void enable_IR_x2apic(void)
{
}
static inline int x2apic_enabled(void)
static inline int x2apic_enabled(void)
{
{
	return 0;
	return 0;
}
}


#define	x2apic	0
#define	x2apic_preenabled 0

#define	x2apic_supported()	0
#endif
#endif


extern int get_physical_broadcast(void);
extern void enable_IR_x2apic(void);


#ifdef CONFIG_X86_X2APIC
extern int get_physical_broadcast(void);
static inline void ack_x2APIC_irq(void)
{
	/* Docs say use 0 for future compatibility */
	native_apic_msr_write(APIC_EOI, 0);
}
#endif


extern void apic_disable(void);
extern int lapic_get_maxlvt(void);
extern int lapic_get_maxlvt(void);
extern void clear_local_APIC(void);
extern void clear_local_APIC(void);
extern void connect_bsp_APIC(void);
extern void connect_bsp_APIC(void);
@@ -252,7 +244,7 @@ static inline void lapic_shutdown(void) { }
#define local_apic_timer_c2_ok		1
#define local_apic_timer_c2_ok		1
static inline void init_apic_mappings(void) { }
static inline void init_apic_mappings(void) { }
static inline void disable_local_APIC(void) { }
static inline void disable_local_APIC(void) { }

static inline void apic_disable(void) { }
#endif /* !CONFIG_X86_LOCAL_APIC */
#endif /* !CONFIG_X86_LOCAL_APIC */


#ifdef CONFIG_X86_64
#ifdef CONFIG_X86_64
+0 −4
Original line number Original line Diff line number Diff line
@@ -60,8 +60,4 @@ extern struct irq_chip i8259A_chip;
extern void mask_8259A(void);
extern void mask_8259A(void);
extern void unmask_8259A(void);
extern void unmask_8259A(void);


#ifdef CONFIG_X86_32
extern void init_ISA_irqs(void);
#endif

#endif /* _ASM_X86_I8259_H */
#endif /* _ASM_X86_I8259_H */
+0 −4
Original line number Original line Diff line number Diff line
@@ -161,15 +161,11 @@ extern int io_apic_set_pci_routing(struct device *dev, int ioapic, int pin,
extern int (*ioapic_renumber_irq)(int ioapic, int irq);
extern int (*ioapic_renumber_irq)(int ioapic, int irq);
extern void ioapic_init_mappings(void);
extern void ioapic_init_mappings(void);


#ifdef CONFIG_X86_64
extern struct IO_APIC_route_entry **alloc_ioapic_entries(void);
extern struct IO_APIC_route_entry **alloc_ioapic_entries(void);
extern void free_ioapic_entries(struct IO_APIC_route_entry **ioapic_entries);
extern void free_ioapic_entries(struct IO_APIC_route_entry **ioapic_entries);
extern int save_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries);
extern int save_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries);
extern void mask_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries);
extern void mask_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries);
extern int restore_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries);
extern int restore_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries);
extern void reinit_intr_remapped_IO_APIC(int intr_remapping,
	struct IO_APIC_route_entry **ioapic_entries);
#endif


extern void probe_nr_irqs_gsi(void);
extern void probe_nr_irqs_gsi(void);


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