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Commit 4286f84e authored by Benjamin Herrenschmidt's avatar Benjamin Herrenschmidt
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Merge remote-tracking branch 'kumar/next' into next

parents 2d87e06e e96dde2b
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+63 −0
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* FSL MPIC Message Registers

This binding specifies what properties must be available in the device tree
representation of the message register blocks found in some FSL MPIC
implementations.

Required properties:

    - compatible: Specifies the compatibility list for the message register
      block.  The type shall be <string-list> and the value shall be of the form
      "fsl,mpic-v<version>-msgr", where <version> is the version number of
      the MPIC containing the message registers.

    - reg: Specifies the base physical address(s) and size(s) of the
      message register block's addressable register space.  The type shall be
      <prop-encoded-array>.

    - interrupts: Specifies a list of interrupt-specifiers which are available
      for receiving interrupts. Interrupt-specifier consists of two cells: first
      cell is interrupt-number and second cell is level-sense. The type shall be
      <prop-encoded-array>.

Optional properties:

    - mpic-msgr-receive-mask: Specifies what registers in the containing block
      are allowed to receive interrupts. The value is a bit mask where a set
      bit at bit 'n' indicates that message register 'n' can receive interrupts.
      Note that "bit 'n'" is numbered from LSB for PPC hardware. The type shall
      be <u32>. If not present, then all of the message registers in the block
      are available.

Aliases:

    An alias should be created for every message register block.  They are not
    required, though.  However, a particular implementation of this binding
    may require aliases to be present.  Aliases are of the form
    'mpic-msgr-block<n>', where <n> is an integer specifying the block's number.
    Numbers shall start at 0.

Example:

	aliases {
		mpic-msgr-block0 = &mpic_msgr_block0;
		mpic-msgr-block1 = &mpic_msgr_block1;
	};

	mpic_msgr_block0: mpic-msgr-block@41400 {
		compatible = "fsl,mpic-v3.1-msgr";
		reg = <0x41400 0x200>;
		// Message registers 0 and 2 in this block can receive interrupts on
		// sources 0xb0 and 0xb2, respectively.
		interrupts = <0xb0 2 0xb2 2>;
		mpic-msgr-receive-mask = <0x5>;
	};

	mpic_msgr_block1: mpic-msgr-block@42400 {
		compatible = "fsl,mpic-v3.1-msgr";
		reg = <0x42400 0x200>;
		// Message registers 0 and 2 in this block can receive interrupts on
		// sources 0xb4 and 0xb6, respectively.
		interrupts = <0xb4 2 0xb6 2>;
		mpic-msgr-receive-mask = <0x5>;
	};
+4 −2
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@@ -6,8 +6,10 @@ Required properties:
  etc.) and the second is "fsl,mpic-msi" or "fsl,ipic-msi" depending on
  etc.) and the second is "fsl,mpic-msi" or "fsl,ipic-msi" depending on
  the parent type.
  the parent type.


- reg : should contain the address and the length of the shared message
- reg : It may contain one or two regions. The first region should contain
  interrupt register set.
  the address and the length of the shared message interrupt register set.
  The second region should contain the address of aliased MSIIR register for
  platforms that have such an alias.


- msi-available-ranges: use <start count> style section to define which
- msi-available-ranges: use <start count> style section to define which
  msi interrupt can be used in the 256 msi interrupts. This property is
  msi interrupt can be used in the 256 msi interrupts. This property is
+1 −1
Original line number Original line Diff line number Diff line
@@ -247,7 +247,7 @@ image-$(CONFIG_ASP834x) += dtbImage.asp834x-redboot
image-$(CONFIG_MPC8540_ADS)		+= cuImage.mpc8540ads
image-$(CONFIG_MPC8540_ADS)		+= cuImage.mpc8540ads
image-$(CONFIG_MPC8560_ADS)		+= cuImage.mpc8560ads
image-$(CONFIG_MPC8560_ADS)		+= cuImage.mpc8560ads
image-$(CONFIG_MPC85xx_CDS)		+= cuImage.mpc8541cds \
image-$(CONFIG_MPC85xx_CDS)		+= cuImage.mpc8541cds \
					   cuImage.mpc8548cds \
					   cuImage.mpc8548cds_32b \
					   cuImage.mpc8555cds
					   cuImage.mpc8555cds
image-$(CONFIG_MPC85xx_MDS)		+= cuImage.mpc8568mds
image-$(CONFIG_MPC85xx_MDS)		+= cuImage.mpc8568mds
image-$(CONFIG_MPC85xx_DS)		+= cuImage.mpc8544ds \
image-$(CONFIG_MPC85xx_DS)		+= cuImage.mpc8544ds \
+2 −2
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@@ -202,7 +202,7 @@
/include/ "pq3-etsec1-timer-0.dtsi"
/include/ "pq3-etsec1-timer-0.dtsi"


	usb@22000 {
	usb@22000 {
		compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
		compatible = "fsl-usb2-mph-v1.2", "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
		reg = <0x22000 0x1000>;
		reg = <0x22000 0x1000>;
		#address-cells = <1>;
		#address-cells = <1>;
		#size-cells = <0>;
		#size-cells = <0>;
@@ -210,7 +210,7 @@
	};
	};


	usb@23000 {
	usb@23000 {
		compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
		compatible = "fsl-usb2-mph-v1.2", "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
		reg = <0x23000 0x1000>;
		reg = <0x23000 0x1000>;
		#address-cells = <1>;
		#address-cells = <1>;
		#size-cells = <0>;
		#size-cells = <0>;
+16 −0
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@@ -89,6 +89,21 @@
	};
	};
};
};


&rio {
	compatible = "fsl,srio";
	interrupts = <48 2 0 0>;
	#address-cells = <2>;
	#size-cells = <2>;
	fsl,srio-rmu-handle = <&rmu>;
	ranges;

	port1 {
		#address-cells = <2>;
		#size-cells = <2>;
		cell-index = <1>;
	};
};

&soc {
&soc {
	#address-cells = <1>;
	#address-cells = <1>;
	#size-cells = <1>;
	#size-cells = <1>;
@@ -134,6 +149,7 @@


/include/ "pq3-sec2.1-0.dtsi"
/include/ "pq3-sec2.1-0.dtsi"
/include/ "pq3-mpic.dtsi"
/include/ "pq3-mpic.dtsi"
/include/ "pq3-rmu-0.dtsi"


	global-utilities@e0000 {
	global-utilities@e0000 {
		compatible = "fsl,mpc8548-guts";
		compatible = "fsl,mpc8548-guts";
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