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Commit 4241119e authored by Ingo Molnar's avatar Ingo Molnar
Browse files

Merge tag 'v4.12-rc4' into x86/mm, to pick up fixes



Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parents e73ad5ff 3c2993b8
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+1 −1
Original line number Diff line number Diff line
@@ -36,7 +36,7 @@ Optional properties:
                control gpios

 - threshold:   allows setting the "click"-threshold in the range
                from 20 to 80.
                from 0 to 80.

 - gain:        allows setting the sensitivity in the range from 0 to
                31. Note that lower values indicate higher
+6 −0
Original line number Diff line number Diff line
@@ -16,6 +16,11 @@ Required properties:
- reg:                  Base address of PMIC on Hi6220 SoC.
- interrupt-controller: Hi655x has internal IRQs (has own IRQ domain).
- pmic-gpios:           The GPIO used by PMIC IRQ.
- #clock-cells:		From common clock binding; shall be set to 0

Optional properties:
- clock-output-names: From common clock binding to override the
  default output clock name

Example:
	pmic: pmic@f8000000 {
@@ -24,4 +29,5 @@ Example:
		interrupt-controller;
		#interrupt-cells = <2>;
		pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
		#clock-cells = <0>;
	}
+2 −0
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@@ -18,6 +18,8 @@ Optional properties:
  "ext_clock" (External clock provided to the card).
- post-power-on-delay-ms : Delay in ms after powering the card and
	de-asserting the reset-gpios (if any)
- power-off-delay-us : Delay in us after asserting the reset-gpios (if any)
	during power off of the card.

Example:

+4 −0
Original line number Diff line number Diff line
@@ -15,6 +15,10 @@ Optional properties:
- phy-reset-active-high : If present then the reset sequence using the GPIO
  specified in the "phy-reset-gpios" property is reversed (H=reset state,
  L=operation state).
- phy-reset-post-delay : Post reset delay in milliseconds. If present then
  a delay of phy-reset-post-delay milliseconds will be observed after the
  phy-reset-gpios has been toggled. Can be omitted thus no delay is
  observed. Delay is in range of 1ms to 1000ms. Other delays are invalid.
- phy-supply : regulator that powers the Ethernet PHY.
- phy-handle : phandle to the PHY device connected to this device.
- fixed-link : Assume a fixed link. See fixed-link.txt in the same directory.
+0 −2
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@@ -247,7 +247,6 @@ bias-bus-hold - latch weakly
bias-pull-up		- pull up the pin
bias-pull-down		- pull down the pin
bias-pull-pin-default	- use pin-default pull state
bi-directional		- pin supports simultaneous input/output operations
drive-push-pull		- drive actively high and low
drive-open-drain	- drive with open drain
drive-open-source	- drive with open source
@@ -260,7 +259,6 @@ input-debounce - debounce mode with debound time X
power-source		- select between different power supplies
low-power-enable	- enable low power mode
low-power-disable	- disable low power mode
output-enable		- enable output on pin regardless of output value
output-low		- set the pin to output mode with low level
output-high		- set the pin to output mode with high level
slew-rate		- set the slew rate
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