Loading Documentation/devicetree/bindings/pinctrl/qcom,lpi-pinctrl.txt +26 −0 Original line number Diff line number Diff line Loading @@ -37,6 +37,18 @@ Following properties are for LPI GPIO controller device main node. The first cell will be used to define gpio number and the second denotes the flags for this gpio. - #qcom,slew-reg: Usage: optional Value type: <prop-encoded-array> Definition: Register base of the slew register and length. - #qcom,lpi-slew-offset-tbl: Usage: optional Value type: <u32-array> Definition: Offset table that points to each pin's shift value position in bits in the slew register base for slew settings. Please refer to ../gpio/gpio.txt for general description of GPIO bindings. Please refer to pinctrl-bindings.txt in this directory for details of the Loading Loading @@ -123,12 +135,18 @@ to specify in a pin configuration subnode: Value type: <u32> Definition: Selects the drive strength for the specified pins. - slew-rate: Usage: optional Value type: <u32> Definition: Selects the slew rate for the specified pins. Example: lpi_tlmm: lpi_pinctrl@152c000 { compatible = "qcom,lpi-pinctrl"; qcom,num-gpios = <32>; reg = <0x152c000 0>; qcom,slew-reg = <0x355a000 0x0>; gpio-controller; #gpio-cells = <2>; qcom,lpi-offset-tbl = <0x00000010>, <0x00000020>, Loading @@ -142,6 +160,13 @@ Example: <0x00000170>, <0x00000180>, <0x00000190>, <0x00000200>, <0x00000210>; qcom,lpi-slew-offset-tbl = <0x00000000>, <0x00000002>, <0x00000004>, <0x00000008>, <0x0000000A>, <0x0000000C>, <0x00000000>, <0x00000000>, <0x00000000>, <0x00000000>, <0x00000010>, <0x00000012>, <0x00000000>, <0x00000000>; hph_comp_active: hph_comp_active { mux { Loading @@ -165,6 +190,7 @@ Example: config { pins = "gpio22"; qcom,drive-strength = <2>; slew-rate = <1>; }; }; }; Loading arch/arm64/boot/dts/qcom/kona-lpi.dtsi +43 −19 Original line number Diff line number Diff line Loading @@ -7,6 +7,7 @@ lpi_tlmm: lpi_pinctrl@33c0000 { compatible = "qcom,lpi-pinctrl"; reg = <0x33c0000 0x0>; qcom,slew-reg = <0x355a000 0x0>; qcom,num-gpios = <14>; gpio-controller; #gpio-cells = <2>; Loading @@ -17,6 +18,13 @@ <0x00008000>, <0x00009000>, <0x0000A000>, <0x0000B000>, <0x0000C000>, <0x0000D000>; qcom,lpi-slew-offset-tbl = <0x00000000>, <0x00000002>, <0x00000004>, <0x00000008>, <0x0000000A>, <0x0000000C>, <0x00000000>, <0x00000000>, <0x00000000>, <0x00000000>, <0x00000010>, <0x00000012>, <0x00000000>, <0x00000000>; quat_mi2s_sck { quat_mi2s_sck_sleep: quat_mi2s_sck_sleep { Loading Loading @@ -1288,7 +1296,8 @@ config { pins = "gpio10"; drive-strength = <2>; bias-bus-hold; input-enable; bias-pull-down; }; }; Loading @@ -1301,7 +1310,8 @@ config { pins = "gpio10"; drive-strength = <2>; bias-bus-hold; slew-rate = <1>; bias-disable; }; }; }; Loading @@ -1315,8 +1325,9 @@ config { pins = "gpio11"; drive-strength = <4>; bias-bus-hold; drive-strength = <2>; input-enable; bias-pull-down; }; }; Loading @@ -1328,7 +1339,8 @@ config { pins = "gpio11"; drive-strength = <4>; drive-strength = <2>; slew-rate = <1>; bias-bus-hold; }; }; Loading @@ -1338,12 +1350,13 @@ mux { pins = "gpio0"; function = "func1"; input-enable; bias-pull-down; }; config { pins = "gpio0"; drive-strength = <2>; bias-bus-hold; }; }; Loading @@ -1355,8 +1368,9 @@ config { pins = "gpio0"; drive-strength = <8>; bias-bus-hold; drive-strength = <2>; slew-rate = <1>; bias-disable; }; }; Loading @@ -1369,7 +1383,8 @@ config { pins = "gpio1"; drive-strength = <2>; bias-bus-hold; input-enable; bias-pull-down; }; }; Loading @@ -1381,7 +1396,8 @@ config { pins = "gpio1"; drive-strength = <8>; drive-strength = <2>; slew-rate = <1>; bias-bus-hold; }; }; Loading @@ -1395,7 +1411,8 @@ config { pins = "gpio2"; drive-strength = <2>; bias-bus-hold; input-enable; bias-pull-down; }; }; Loading @@ -1407,7 +1424,8 @@ config { pins = "gpio2"; drive-strength = <8>; drive-strength = <2>; slew-rate = <1>; bias-bus-hold; }; }; Loading @@ -1421,7 +1439,8 @@ config { pins = "gpio3"; drive-strength = <2>; bias-bus-hold; input-enable; bias-pull-down; }; }; Loading @@ -1433,8 +1452,9 @@ config { pins = "gpio3"; drive-strength = <8>; bias-bus-hold; drive-strength = <2>; slew-rate = <1>; bias-disable; }; }; Loading @@ -1447,7 +1467,8 @@ config { pins = "gpio4"; drive-strength = <2>; bias-bus-hold; input-enable; bias-pull-down; }; }; Loading @@ -1459,7 +1480,8 @@ config { pins = "gpio4"; drive-strength = <8>; drive-strength = <2>; slew-rate = <1>; bias-bus-hold; }; }; Loading @@ -1473,7 +1495,8 @@ config { pins = "gpio5"; drive-strength = <2>; bias-bus-hold; input-enable; bias-pull-down; }; }; Loading @@ -1485,7 +1508,8 @@ config { pins = "gpio5"; drive-strength = <8>; drive-strength = <2>; slew-rate = <1>; bias-bus-hold; }; }; Loading Loading
Documentation/devicetree/bindings/pinctrl/qcom,lpi-pinctrl.txt +26 −0 Original line number Diff line number Diff line Loading @@ -37,6 +37,18 @@ Following properties are for LPI GPIO controller device main node. The first cell will be used to define gpio number and the second denotes the flags for this gpio. - #qcom,slew-reg: Usage: optional Value type: <prop-encoded-array> Definition: Register base of the slew register and length. - #qcom,lpi-slew-offset-tbl: Usage: optional Value type: <u32-array> Definition: Offset table that points to each pin's shift value position in bits in the slew register base for slew settings. Please refer to ../gpio/gpio.txt for general description of GPIO bindings. Please refer to pinctrl-bindings.txt in this directory for details of the Loading Loading @@ -123,12 +135,18 @@ to specify in a pin configuration subnode: Value type: <u32> Definition: Selects the drive strength for the specified pins. - slew-rate: Usage: optional Value type: <u32> Definition: Selects the slew rate for the specified pins. Example: lpi_tlmm: lpi_pinctrl@152c000 { compatible = "qcom,lpi-pinctrl"; qcom,num-gpios = <32>; reg = <0x152c000 0>; qcom,slew-reg = <0x355a000 0x0>; gpio-controller; #gpio-cells = <2>; qcom,lpi-offset-tbl = <0x00000010>, <0x00000020>, Loading @@ -142,6 +160,13 @@ Example: <0x00000170>, <0x00000180>, <0x00000190>, <0x00000200>, <0x00000210>; qcom,lpi-slew-offset-tbl = <0x00000000>, <0x00000002>, <0x00000004>, <0x00000008>, <0x0000000A>, <0x0000000C>, <0x00000000>, <0x00000000>, <0x00000000>, <0x00000000>, <0x00000010>, <0x00000012>, <0x00000000>, <0x00000000>; hph_comp_active: hph_comp_active { mux { Loading @@ -165,6 +190,7 @@ Example: config { pins = "gpio22"; qcom,drive-strength = <2>; slew-rate = <1>; }; }; }; Loading
arch/arm64/boot/dts/qcom/kona-lpi.dtsi +43 −19 Original line number Diff line number Diff line Loading @@ -7,6 +7,7 @@ lpi_tlmm: lpi_pinctrl@33c0000 { compatible = "qcom,lpi-pinctrl"; reg = <0x33c0000 0x0>; qcom,slew-reg = <0x355a000 0x0>; qcom,num-gpios = <14>; gpio-controller; #gpio-cells = <2>; Loading @@ -17,6 +18,13 @@ <0x00008000>, <0x00009000>, <0x0000A000>, <0x0000B000>, <0x0000C000>, <0x0000D000>; qcom,lpi-slew-offset-tbl = <0x00000000>, <0x00000002>, <0x00000004>, <0x00000008>, <0x0000000A>, <0x0000000C>, <0x00000000>, <0x00000000>, <0x00000000>, <0x00000000>, <0x00000010>, <0x00000012>, <0x00000000>, <0x00000000>; quat_mi2s_sck { quat_mi2s_sck_sleep: quat_mi2s_sck_sleep { Loading Loading @@ -1288,7 +1296,8 @@ config { pins = "gpio10"; drive-strength = <2>; bias-bus-hold; input-enable; bias-pull-down; }; }; Loading @@ -1301,7 +1310,8 @@ config { pins = "gpio10"; drive-strength = <2>; bias-bus-hold; slew-rate = <1>; bias-disable; }; }; }; Loading @@ -1315,8 +1325,9 @@ config { pins = "gpio11"; drive-strength = <4>; bias-bus-hold; drive-strength = <2>; input-enable; bias-pull-down; }; }; Loading @@ -1328,7 +1339,8 @@ config { pins = "gpio11"; drive-strength = <4>; drive-strength = <2>; slew-rate = <1>; bias-bus-hold; }; }; Loading @@ -1338,12 +1350,13 @@ mux { pins = "gpio0"; function = "func1"; input-enable; bias-pull-down; }; config { pins = "gpio0"; drive-strength = <2>; bias-bus-hold; }; }; Loading @@ -1355,8 +1368,9 @@ config { pins = "gpio0"; drive-strength = <8>; bias-bus-hold; drive-strength = <2>; slew-rate = <1>; bias-disable; }; }; Loading @@ -1369,7 +1383,8 @@ config { pins = "gpio1"; drive-strength = <2>; bias-bus-hold; input-enable; bias-pull-down; }; }; Loading @@ -1381,7 +1396,8 @@ config { pins = "gpio1"; drive-strength = <8>; drive-strength = <2>; slew-rate = <1>; bias-bus-hold; }; }; Loading @@ -1395,7 +1411,8 @@ config { pins = "gpio2"; drive-strength = <2>; bias-bus-hold; input-enable; bias-pull-down; }; }; Loading @@ -1407,7 +1424,8 @@ config { pins = "gpio2"; drive-strength = <8>; drive-strength = <2>; slew-rate = <1>; bias-bus-hold; }; }; Loading @@ -1421,7 +1439,8 @@ config { pins = "gpio3"; drive-strength = <2>; bias-bus-hold; input-enable; bias-pull-down; }; }; Loading @@ -1433,8 +1452,9 @@ config { pins = "gpio3"; drive-strength = <8>; bias-bus-hold; drive-strength = <2>; slew-rate = <1>; bias-disable; }; }; Loading @@ -1447,7 +1467,8 @@ config { pins = "gpio4"; drive-strength = <2>; bias-bus-hold; input-enable; bias-pull-down; }; }; Loading @@ -1459,7 +1480,8 @@ config { pins = "gpio4"; drive-strength = <8>; drive-strength = <2>; slew-rate = <1>; bias-bus-hold; }; }; Loading @@ -1473,7 +1495,8 @@ config { pins = "gpio5"; drive-strength = <2>; bias-bus-hold; input-enable; bias-pull-down; }; }; Loading @@ -1485,7 +1508,8 @@ config { pins = "gpio5"; drive-strength = <8>; drive-strength = <2>; slew-rate = <1>; bias-bus-hold; }; }; Loading