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Commit 406c2bf9 authored by Vignesh Kulothungan's avatar Vignesh Kulothungan
Browse files

ASoC: Kona: limit sample rate and format support based on codec 



Add support to limit sample rate and format support based on
codec variant. Register mixer controls based on the codec
limitation.

Change-Id: I8055d2862798e183669e99b472ffc03b6cedd8ca
Signed-off-by: default avatarVignesh Kulothungan <vigneshk@codeaurora.org>
parent c001b153

asoc/kona.c

+124 −45
Original line number Diff line number Diff line
@@ -494,6 +494,7 @@ static int msm_vi_feed_tx_ch = 2; 
static const char *const vi_feed_ch_text[] = {"One", "Two"};

static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",

					  "S32_LE"};

static char const *cdc80_bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE"};

static char const *ch_text[] = {"Two", "Three", "Four", "Five",

					"Six", "Seven", "Eight"};

static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
@@ -528,6 +529,11 @@ static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025", 
						 "KHZ_88P2", "KHZ_96",

						 "KHZ_176P4", "KHZ_192",

						 "KHZ_352P8", "KHZ_384"};

static char const *cdc80_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",

						 "KHZ_16", "KHZ_22P05",

						 "KHZ_32", "KHZ_44P1", "KHZ_48",

						 "KHZ_88P2", "KHZ_96",

						 "KHZ_176P4", "KHZ_192"};

static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",

						 "S24_3LE"};

static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
@@ -616,11 +622,6 @@ static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text); 
static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);

static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);

static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);

static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);

static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);

static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);

static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);

static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);

static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);

static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);

static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
@@ -633,16 +634,6 @@ static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate, 
				cdc_dma_sample_rate_text);

static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,

				cdc_dma_sample_rate_text);

static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,

				cdc_dma_sample_rate_text);

static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,

				cdc_dma_sample_rate_text);

static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,

				cdc_dma_sample_rate_text);

static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,

				cdc_dma_sample_rate_text);

static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,

				cdc_dma_sample_rate_text);

static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,

				cdc_dma_sample_rate_text);

static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
@@ -661,6 +652,40 @@ static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_sample_rate, 
				cdc_dma_sample_rate_text);

static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_sample_rate,

				cdc_dma_sample_rate_text);



/* WCD9380 */

static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_0_format, cdc80_bit_format_text);

static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_1_format, cdc80_bit_format_text);

static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_2_format, cdc80_bit_format_text);

static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_3_format, cdc80_bit_format_text);

static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_5_format, cdc80_bit_format_text);

static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_0_sample_rate,

				cdc80_dma_sample_rate_text);

static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_1_sample_rate,

				cdc80_dma_sample_rate_text);

static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_2_sample_rate,

				cdc80_dma_sample_rate_text);

static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_3_sample_rate,

				cdc80_dma_sample_rate_text);

static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_5_sample_rate,

				cdc80_dma_sample_rate_text);

/* WCD9385 */

static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_0_format, bit_format_text);

static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_1_format, bit_format_text);

static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_2_format, bit_format_text);

static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_3_format, bit_format_text);

static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_5_format, bit_format_text);

static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_0_sample_rate,

				cdc_dma_sample_rate_text);

static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_1_sample_rate,

				cdc_dma_sample_rate_text);

static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_2_sample_rate,

				cdc_dma_sample_rate_text);

static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_3_sample_rate,

				cdc_dma_sample_rate_text);

static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_5_sample_rate,

				cdc_dma_sample_rate_text);



static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);

static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);

static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
@@ -3295,16 +3320,6 @@ static const struct snd_kcontrol_new msm_int_snd_controls[] = { 
			cdc_dma_rx_format_get, cdc_dma_rx_format_put),

	SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,

			cdc_dma_rx_format_get, cdc_dma_rx_format_put),

	SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,

			cdc_dma_rx_format_get, cdc_dma_rx_format_put),

	SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,

			cdc_dma_rx_format_get, cdc_dma_rx_format_put),

	SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,

			cdc_dma_rx_format_get, cdc_dma_rx_format_put),

	SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,

			cdc_dma_rx_format_get, cdc_dma_rx_format_put),

	SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,

			cdc_dma_rx_format_get, cdc_dma_rx_format_put),

	SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,

			cdc_dma_tx_format_get, cdc_dma_tx_format_put),

	SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
@@ -3329,26 +3344,6 @@ static const struct snd_kcontrol_new msm_int_snd_controls[] = { 
			wsa_cdc_dma_rx_1_sample_rate,

			cdc_dma_rx_sample_rate_get,

			cdc_dma_rx_sample_rate_put),

	SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",

			rx_cdc_dma_rx_0_sample_rate,

			cdc_dma_rx_sample_rate_get,

			cdc_dma_rx_sample_rate_put),

	SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",

			rx_cdc_dma_rx_1_sample_rate,

			cdc_dma_rx_sample_rate_get,

			cdc_dma_rx_sample_rate_put),

	SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",

			rx_cdc_dma_rx_2_sample_rate,

			cdc_dma_rx_sample_rate_get,

			cdc_dma_rx_sample_rate_put),

	SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",

			rx_cdc_dma_rx_3_sample_rate,

			cdc_dma_rx_sample_rate_get,

			cdc_dma_rx_sample_rate_put),

	SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",

			rx_cdc_dma_rx_5_sample_rate,

			cdc_dma_rx_sample_rate_get,

			cdc_dma_rx_sample_rate_put),

	SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",

			wsa_cdc_dma_tx_0_sample_rate,

			cdc_dma_tx_sample_rate_get,
@@ -3387,6 +3382,72 @@ static const struct snd_kcontrol_new msm_int_snd_controls[] = { 
			cdc_dma_tx_sample_rate_put),

};



static const struct snd_kcontrol_new msm_int_wcd9380_snd_controls[] = {

	SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc80_dma_rx_0_format,

			cdc_dma_rx_format_get, cdc_dma_rx_format_put),

	SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc80_dma_rx_1_format,

			cdc_dma_rx_format_get, cdc_dma_rx_format_put),

	SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc80_dma_rx_2_format,

			cdc_dma_rx_format_get, cdc_dma_rx_format_put),

	SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc80_dma_rx_3_format,

			cdc_dma_rx_format_get, cdc_dma_rx_format_put),

	SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc80_dma_rx_5_format,

			cdc_dma_rx_format_get, cdc_dma_rx_format_put),

	SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",

			rx_cdc80_dma_rx_0_sample_rate,

			cdc_dma_rx_sample_rate_get,

			cdc_dma_rx_sample_rate_put),

	SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",

			rx_cdc80_dma_rx_1_sample_rate,

			cdc_dma_rx_sample_rate_get,

			cdc_dma_rx_sample_rate_put),

	SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",

			rx_cdc80_dma_rx_2_sample_rate,

			cdc_dma_rx_sample_rate_get,

			cdc_dma_rx_sample_rate_put),

	SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",

			rx_cdc80_dma_rx_3_sample_rate,

			cdc_dma_rx_sample_rate_get,

			cdc_dma_rx_sample_rate_put),

	SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",

			rx_cdc80_dma_rx_5_sample_rate,

			cdc_dma_rx_sample_rate_get,

			cdc_dma_rx_sample_rate_put),

};



static const struct snd_kcontrol_new msm_int_wcd9385_snd_controls[] = {

	SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc85_dma_rx_0_format,

			cdc_dma_rx_format_get, cdc_dma_rx_format_put),

	SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc85_dma_rx_1_format,

			cdc_dma_rx_format_get, cdc_dma_rx_format_put),

	SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc85_dma_rx_2_format,

			cdc_dma_rx_format_get, cdc_dma_rx_format_put),

	SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc85_dma_rx_3_format,

			cdc_dma_rx_format_get, cdc_dma_rx_format_put),

	SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc85_dma_rx_5_format,

			cdc_dma_rx_format_get, cdc_dma_rx_format_put),

	SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",

			rx_cdc85_dma_rx_0_sample_rate,

			cdc_dma_rx_sample_rate_get,

			cdc_dma_rx_sample_rate_put),

	SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",

			rx_cdc85_dma_rx_1_sample_rate,

			cdc_dma_rx_sample_rate_get,

			cdc_dma_rx_sample_rate_put),

	SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",

			rx_cdc85_dma_rx_2_sample_rate,

			cdc_dma_rx_sample_rate_get,

			cdc_dma_rx_sample_rate_put),

	SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",

			rx_cdc85_dma_rx_3_sample_rate,

			cdc_dma_rx_sample_rate_get,

			cdc_dma_rx_sample_rate_put),

	SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",

			rx_cdc85_dma_rx_5_sample_rate,

			cdc_dma_rx_sample_rate_get,

			cdc_dma_rx_sample_rate_put),

};



static const struct snd_kcontrol_new msm_common_snd_controls[] = {

	SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,

			usb_audio_rx_sample_rate_get,
@@ -7155,6 +7216,7 @@ static int msm_aux_codec_init(struct snd_soc_component *component) 
{

	struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);

	int ret = 0;

	int codec_variant = -1;

	void *mbhc_calibration;

	struct snd_info_entry *entry;

	struct snd_card *card = component->card->snd_card;
@@ -7184,6 +7246,23 @@ static int msm_aux_codec_init(struct snd_soc_component *component) 
	}

	wcd938x_info_create_codec_entry(pdata->codec_root, component);



	codec_variant = wcd938x_get_codec_variant(component);

	dev_dbg(component->dev, "%s: variant %d\n", __func__, codec_variant);

	if (codec_variant == WCD9380)

		ret = snd_soc_add_component_controls(component,

					msm_int_wcd9380_snd_controls,

					ARRAY_SIZE(msm_int_wcd9380_snd_controls));

	else if (codec_variant == WCD9385)

		ret = snd_soc_add_component_controls(component,

					msm_int_wcd9385_snd_controls,

					ARRAY_SIZE(msm_int_wcd9385_snd_controls));



	if (ret < 0) {

		dev_err(component->dev, "%s: add codec specific snd controls failed: %d\n",

			__func__, ret);

		return ret;

	}



mbhc_cfg_cal:

	mbhc_calibration = def_wcd_mbhc_cal();

	if (!mbhc_calibration)