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Commit 403e998e authored by Nitin Rawat's avatar Nitin Rawat
Browse files

ARM: dts: msm: Add ufsphy as apps_rsc child device 

UFS phy needs to be added as apps_rsc child since it needs to vote
for rpmh resources.

Change-Id: Ic23d10bc04579c926e17600b88a7332ef26b3cce
parent f5b81250

qcom/lagoon.dtsi

+20 −17
Original line number Diff line number Diff line
@@ -741,23 +741,6 @@ 
		qcom,instance-type = "ufs";

	};



	ufsphy_mem: ufsphy_mem@1d87000 {

		reg = <0x1d87000 0xe00>; /* PHY regs */

		reg-names = "phy_mem";

		#phy-cells = <0>;

		ufs-qcom-crypto = <&ufs_ice>;



		lanes-per-direction = <2>;



		clock-names = "ref_clk_src",

			"ref_clk",

			"ref_aux_clk";

		clocks = <&rpmhcc RPMH_CXO_CLK>,

			<&gcc GCC_UFS_MEM_CLKREF_CLK>,

			<&gcc GCC_UFS_PHY_PHY_AUX_CLK>;



		status = "disabled";

	};



	ufshc_mem: ufshc@1d84000 {

		compatible = "qcom,ufshc";
@@ -1022,6 +1005,26 @@ 
			compatible = "qcom,lagoon-rpmh-clk";

			#clock-cells = <1>;

		};



		ufsphy_mem: ufsphy_mem@1d87000 {

			reg = <0x1d87000 0xe00>; /* PHY regs */

			reg-names = "phy_mem";

			#phy-cells = <0>;

			ufs-qcom-crypto = <&ufs_ice>;



			lanes-per-direction = <2>;



			qcom,rpmh-resource-name = "qphy.lvl";

			clock-names = "ref_clk_src",

				"ref_clk",

				"ref_aux_clk";

			clocks = <&rpmhcc RPMH_CXO_CLK>,

				<&gcc GCC_UFS_MEM_CLKREF_CLK>,

				<&gcc GCC_UFS_PHY_PHY_AUX_CLK>;



			status = "disabled";

		};



	};



	disp_rsc: rsc@af20000 {