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Commit 402521b8 authored by Linus Torvalds's avatar Linus Torvalds
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Merge tag 'for-linus-20150216' of git://git.infradead.org/linux-mtd 

Pull MTD updates from Brian Norris:
 "NAND:

   - Add new Hisilicon NAND driver for Hip04
   - Add default reboot handler, to ensure all outstanding erase
     transactions complete in time
   - jz4740: convert to use GPIO descriptor API
   - Atmel: add support for sama5d4
   - Change default bitflip threshold to 75% of correction strength
   - Miscellaneous cleanups and bugfixes

  SPI NOR:

   - Freescale QuadSPI:
   - Fix a few probe() and remove() issues
   - Add a MAINTAINERS entry for this driver
   - Tweak transfer size to increase read performance
   - Add suspend/resume support
   - Add Micron quad I/O support
   - ST FSM SPI: miscellaneous fixes

  JFFS2:

   - gracefully handle corrupted 'offset' field found on flash

  Other:

   - bcm47xxpart: add tweaks for a few new devices
   - mtdconcat: set return lengths properly for mtd_write_oob()
   - map_ram: enable use with mtdoops
   - maps: support fallback to ROM/UBI for write-protected NOR flash"

* tag 'for-linus-20150216' of git://git.infradead.org/linux-mtd: (46 commits)
  mtd: hisilicon: && vs & typo
  jffs2: fix handling of corrupted summary length
  mtd: hisilicon: add device tree binding documentation
  mtd: hisilicon: add a new NAND controller driver for hisilicon hip04 Soc
  mtd: avoid registering reboot notifier twice
  mtd: concat: set the return lengths properly
  mtd: kconfig: replace PPC_OF with PPC
  mtd: denali: remove unnecessary stubs
  mtd: nand: remove redundant local variable
  MAINTAINERS: add maintainer entry for FREESCALE QUAD SPI driver
  mtd: fsl-quadspi: improve read performance by increase AHB transfer size
  mtd: fsl-quadspi: Remove unnecessary 'map_failed' label
  mtd: fsl-quadspi: Remove unneeded success/error messages
  mtd: fsl-quadspi: Fix the error paths
  mtd: nand: omap: drop condition with no effect
  mtd: nand: jz4740: Convert to GPIO descriptor API
  mtd: nand: Request strength instead of bytes for soft BCH
  mtd: nand: default bitflip-reporting threshold to 75% of correction strength
  mtd: atmel_nand: introduce a new compatible string for sama5d4 chip
  mtd: atmel_nand: return max bitflips in all sectors in pmecc_correction()
  ...
parents f5af19d1 eb928d40

Documentation/devicetree/bindings/mtd/atmel-nand.txt

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Atmel NAND flash



Required properties:

- compatible : "atmel,at91rm9200-nand".

- compatible : should be "atmel,at91rm9200-nand" or "atmel,sama5d4-nand".

- reg : should specify localbus address and size used for the chip,

	and hardware ECC controller if available.

	If the hardware ECC is PMECC, it should contain address and size for

Documentation/devicetree/bindings/mtd/fsl-quadspi.txt

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* Freescale Quad Serial Peripheral Interface(QuadSPI)



Required properties:

  - compatible : Should be "fsl,vf610-qspi"

  - compatible : Should be "fsl,vf610-qspi" or "fsl,imx6sx-qspi"

  - reg : the first contains the register location and length,

          the second contains the memory mapping address and length

  - reg-names: Should contain the reg names "QuadSPI" and "QuadSPI-memory"

Documentation/devicetree/bindings/mtd/gpmi-nand.txt

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* Freescale General-Purpose Media Interface (GPMI)



The GPMI nand controller provides an interface to control the

NAND flash chips. We support only one NAND chip now.

NAND flash chips.



Required properties:

  - compatible : should be "fsl,<chip>-gpmi-nand"

Documentation/devicetree/bindings/mtd/hisi504-nand.txt

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Hisilicon Hip04 Soc NAND controller DT binding



Required properties:



- compatible:          Should be "hisilicon,504-nfc".

- reg:                 The first contains base physical address and size of

                       NAND controller's registers. The second contains base

                       physical address and size of NAND controller's buffer.

- interrupts:          Interrupt number for nfc.

- nand-bus-width:      See nand.txt.

- nand-ecc-mode:       Support none and hw ecc mode.

- #address-cells:      Partition address, should be set 1.

- #size-cells:         Partition size, should be set 1.



Optional properties:



- nand-ecc-strength:   Number of bits to correct per ECC step.

- nand-ecc-step-size:  Number of data bytes covered by a single ECC step.



The following ECC strength and step size are currently supported:



 - nand-ecc-strength = <16>, nand-ecc-step-size = <1024>



Flash chip may optionally contain additional sub-nodes describing partitions of

the address space. See partition.txt for more detail.



Example:



	nand: nand@4020000 {

		compatible = "hisilicon,504-nfc";

		reg = <0x4020000 0x10000>, <0x5000000 0x1000>;

		interrupts = <0 379 4>;

		nand-bus-width = <8>;

		nand-ecc-mode = "hw";

		nand-ecc-strength = <16>;

		nand-ecc-step-size = <1024>;

		#address-cells = <1>;

		#size-cells = <1>;



		partition@0 {

			label = "nand_text";

			reg = <0x00000000 0x00400000>;

		};



		...



	};

Documentation/devicetree/bindings/mtd/mtd-physmap.txt

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@@ -36,6 +36,11 @@ are defined: 
 - vendor-id : Contains the flash chip's vendor id (1 byte).

 - device-id : Contains the flash chip's device id (1 byte).



For ROM compatible devices (and ROM fallback from cfi-flash), the following

additional (optional) property is defined:



 - erase-size : The chip's physical erase block size in bytes.



The device tree may optionally contain sub-nodes describing partitions of the

address space. See partition.txt for more detail.